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Results 1 - 10 of 44 for vnegw (0.05 sec)

  1. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go

    	VINSERTH:       "vinserth",
    	VINSERTW:       "vinsertw",
    	VMUL10CUQ:      "vmul10cuq",
    	VMUL10ECUQ:     "vmul10ecuq",
    	VMUL10EUQ:      "vmul10euq",
    	VMUL10UQ:       "vmul10uq",
    	VNEGD:          "vnegd",
    	VNEGW:          "vnegw",
    	VPERMR:         "vpermr",
    	VPRTYBD:        "vprtybd",
    	VPRTYBQ:        "vprtybq",
    	VPRTYBW:        "vprtybw",
    	VRLDMI:         "vrldmi",
    	VRLDNM:         "vrldnm",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 334.7K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/arm64/anames.go

    	"CCMN",
    	"CCMNW",
    	"CCMP",
    	"CCMPW",
    	"CINC",
    	"CINCW",
    	"CINV",
    	"CINVW",
    	"CLREX",
    	"CLS",
    	"CLSW",
    	"CLZ",
    	"CLZW",
    	"CMN",
    	"CMNW",
    	"CMP",
    	"CMPW",
    	"CNEG",
    	"CNEGW",
    	"CRC32B",
    	"CRC32CB",
    	"CRC32CH",
    	"CRC32CW",
    	"CRC32CX",
    	"CRC32H",
    	"CRC32W",
    	"CRC32X",
    	"CSEL",
    	"CSELW",
    	"CSET",
    	"CSETM",
    	"CSETMW",
    	"CSETW",
    	"CSINC",
    	"CSINCW",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 18 01:40:37 UTC 2023
    - 5.4K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/riscv/anames.go

    	"BNEZ",
    	"FABSD",
    	"FABSS",
    	"FNEGD",
    	"FNEGS",
    	"FNED",
    	"FNES",
    	"MOV",
    	"MOVB",
    	"MOVBU",
    	"MOVF",
    	"MOVD",
    	"MOVH",
    	"MOVHU",
    	"MOVW",
    	"MOVWU",
    	"NEG",
    	"NEGW",
    	"NOT",
    	"SEQZ",
    	"SNEZ",
    	"LAST",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 2.9K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/mips/anames.go

    	"MOVF",
    	"MOVFD",
    	"MOVFW",
    	"MOVH",
    	"MOVHU",
    	"MOVW",
    	"MOVWD",
    	"MOVWF",
    	"MOVWL",
    	"MOVWR",
    	"MSUB",
    	"MUL",
    	"MULD",
    	"MULF",
    	"MULU",
    	"MULW",
    	"NEGD",
    	"NEGF",
    	"NEGW",
    	"NEGV",
    	"NOOP",
    	"NOR",
    	"OR",
    	"REM",
    	"REMU",
    	"RFE",
    	"ROTR",
    	"ROTRV",
    	"SC",
    	"SCV",
    	"SEB",
    	"SEH",
    	"SGT",
    	"SGTU",
    	"SLL",
    	"SQRTD",
    	"SQRTF",
    	"SRA",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 1.4K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/loong64/anames.go

    	"MOVFD",
    	"MOVFW",
    	"MOVH",
    	"MOVHU",
    	"MOVW",
    	"MOVWD",
    	"MOVWF",
    	"MOVWL",
    	"MOVWR",
    	"MUL",
    	"MULD",
    	"MULF",
    	"MULU",
    	"MULH",
    	"MULHU",
    	"MULW",
    	"NEGD",
    	"NEGF",
    	"NEGW",
    	"NEGV",
    	"NOOP",
    	"NOR",
    	"OR",
    	"REM",
    	"REMU",
    	"RFE",
    	"SC",
    	"SCV",
    	"SGT",
    	"SGTU",
    	"SLL",
    	"SQRTD",
    	"SQRTF",
    	"SRA",
    	"SRL",
    	"ROTR",
    	"SUB",
    	"SUBD",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  6. src/cmd/internal/obj/loong64/a.out.go

    	AMOVFW
    
    	AMOVH
    	AMOVHU
    	AMOVW
    
    	AMOVWD
    	AMOVWF
    
    	AMOVWL
    	AMOVWR
    
    	AMUL
    	AMULD
    	AMULF
    	AMULU
    	AMULH
    	AMULHU
    	AMULW
    	ANEGD
    	ANEGF
    
    	ANEGW
    	ANEGV
    
    	ANOOP // hardware nop
    	ANOR
    	AOR
    	AREM
    	AREMU
    
    	ARFE
    
    	ASC
    	ASCV
    
    	ASGT
    	ASGTU
    
    	ASLL
    	ASQRTD
    	ASQRTF
    	ASRA
    	ASRL
    	AROTR
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 5.7K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/riscv64.s

    	MOVB	X5, tls(SB)				// b70f00009b8f0f00b38f4f0023805f00
    
    	// NOT pseudo-instruction
    	NOT	X5					// 93c2f2ff
    	NOT	X5, X6					// 13c3f2ff
    
    	// NEG/NEGW pseudo-instructions
    	NEG	X5					// b3025040
    	NEG	X5, X6					// 33035040
    	NEGW	X5					// bb025040
    	NEGW	X5, X6					// 3b035040
    
    	// This jumps to the second instruction in the function (the
    	// first instruction is an invisible stack pointer adjustment).
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 22 04:42:21 UTC 2024
    - 16.7K bytes
    - Viewed (0)
  8. src/cmd/vendor/golang.org/x/arch/arm/armasm/tables.go

    	VNEG_GT_F32:       "VNEG.GT.F32",
    	VNEG_LE_F32:       "VNEG.LE.F32",
    	VNEG_F32:          "VNEG.F32",
    	VNEG_ZZ_F32:       "VNEG.ZZ.F32",
    	VNEG_EQ_F64:       "VNEG.EQ.F64",
    	VNEG_NE_F64:       "VNEG.NE.F64",
    	VNEG_CS_F64:       "VNEG.CS.F64",
    	VNEG_CC_F64:       "VNEG.CC.F64",
    	VNEG_MI_F64:       "VNEG.MI.F64",
    	VNEG_PL_F64:       "VNEG.PL.F64",
    	VNEG_VS_F64:       "VNEG.VS.F64",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Aug 16 17:57:48 UTC 2017
    - 267.4K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/_gen/ARM64.rules

    
    (MNEGW x (MOVDconst [c])) && int32(c)==-1 => (MOVWUreg x)
    (MNEGW _ (MOVDconst [c])) && int32(c)==0 => (MOVDconst [0])
    (MNEGW x (MOVDconst [c])) && int32(c)==1 => (MOVWUreg (NEG <x.Type> x))
    (MNEGW x (MOVDconst [c])) && isPowerOfTwo64(c) => (NEG (SLLconst <x.Type> [log64(c)] x))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 113.1K bytes
    - Viewed (0)
  10. test/codegen/noextend.go

    func noUnsignEXT(t1, t2, t3, t4 uint32, k int64) uint64 {
    	var ret uint64
    
    	// arm64:"RORW",-"MOVWU"
    	ret += uint64(bits.RotateLeft32(t1, 7))
    
    	// arm64:"MULW",-"MOVWU"
    	ret *= uint64(t1 * t2)
    
    	// arm64:"MNEGW",-"MOVWU"
    	ret += uint64(-t1 * t3)
    
    	// arm64:"UDIVW",-"MOVWU"
    	ret += uint64(t1 / t4)
    
    	// arm64:-"MOVWU"
    	ret += uint64(t2 % t3)
    
    	// arm64:"MSUBW",-"MOVWU"
    	ret += uint64(t1 - t2*t3)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Dec 14 17:22:18 UTC 2023
    - 5.4K bytes
    - Viewed (0)
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