JZ aligned

	// Process the first few bytes to 8-byte align the input.

	// BX = 8 - BX. We need to process this many bytes to align.
	SUBQ $1, BX
	XORQ $7, BX

	BTQ $0, BX
	JNC align_2

	CRC32B (SI), AX
	DECQ CX
	INCQ SI

align_2:
	BTQ $1, BX
	JNC align_4

	CRC32W (SI), AX

	SUBQ $2, CX
	ADDQ $2, SI

align_4:
	BTQ $2, BX
	JNC aligned

	CRC32L (SI), AX

	MOVWU.P	4(R13), R10
	CRC32W	R10, R9

less_than_4:
	TBZ	$1, R11, less_than_2

	MOVHU.P	2(R13), R10
	CRC32H	R10, R9

less_than_2:
	TBZ	$0, R11, done

	MOVBU	(R13), R10
	CRC32B	R10, R9

done:
	MOVWU	R9, ret+32(FP)

	"CCMNW",
	"CCMP",
	"CCMPW",
	"CINC",
	"CINCW",
	"CINV",
	"CINVW",
	"CLREX",
	"CLS",
	"CLSW",
	"CLZ",
	"CLZW",
	"CMN",
	"CMNW",
	"CMP",
	"CMPW",
	"CNEG",
	"CNEGW",
	"CRC32B",
	"CRC32CB",
	"CRC32CH",
	"CRC32CW",
	"CRC32CX",
	"CRC32H",
	"CRC32W",
	"CRC32X",
	"CSEL",
	"CSELW",
	"CSET",
	"CSETM",
	"CSETMW",
	"CSETW",
	"CSINC",
	"CSINCW",

		if countPrefix(&inst, 0xF2) > 1 {
			unmarkImplicit(&inst, 0xF2)
			markLastImplicit(&inst, 0xF2)
		}

		// An unused data size override should probably be shown,
		// to distinguish DATA16 CRC32B from plain CRC32B,
		// but libopcodes always treats the final override as implicit
		// and the others as explicit.
		unmarkImplicit(&inst, PrefixDataSize)
		markLastImplicit(&inst, PrefixDataSize)

	"CMPSL",
	"CMPSQ",
	"CMPSS",
	"CMPSW",
	"CMPW",
	"CMPXCHG16B",
	"CMPXCHG8B",
	"CMPXCHGB",
	"CMPXCHGL",
	"CMPXCHGQ",
	"CMPXCHGW",
	"COMISD",
	"COMISS",
	"CPUID",
	"CQO",
	"CRC32B",
	"CRC32L",
	"CRC32Q",
	"CRC32W",
	"CVTPD2PL",
	"CVTPD2PS",
	"CVTPL2PD",
	"CVTPL2PS",
	"CVTPS2PD",
	"CVTPS2PL",
	"CVTSD2SL",
	"CVTSD2SQ",
	"CVTSD2SS",
	"CVTSL2SD",

	}

	return op
}

// No need add "W" to opcode suffix.
// Opcode must be inserted in ascending order.
var noSuffixOpSet = strings.Fields(`
AESD
AESE
AESIMC
AESMC
CRC32B
CRC32CB
CRC32CH
CRC32CW
CRC32CX
CRC32H
CRC32W
CRC32X
LDARB
LDARH
LDAXRB
LDAXRH
LDTRH
LDXRB
LDXRH
SHA1C
SHA1H
SHA1M
SHA1P
SHA1SU0
SHA1SU1

	CMHI:      "CMHI",
	CMHS:      "CMHS",
	CMLE:      "CMLE",
	CMLT:      "CMLT",
	CMN:       "CMN",
	CMP:       "CMP",
	CMTST:     "CMTST",
	CNEG:      "CNEG",
	CNT:       "CNT",
	CRC32B:    "CRC32B",
	CRC32CB:   "CRC32CB",
	CRC32CH:   "CRC32CH",
	CRC32CW:   "CRC32CW",
	CRC32CX:   "CRC32CX",
	CRC32H:    "CRC32H",
	CRC32W:    "CRC32W",
	CRC32X:    "CRC32X",
	CSEL:      "CSEL",

	CNEGW PL, R9, R14                          // 2e45895a
	CSNEGW HS, R5, R9, R14                     // ae24895a
	CSNEG PL, R14, R21, R3                     // c35595da
	CNEG  LO, R7, R15                          // ef2487da
	CRC32B R17, R8, R16                        // 1041d11a
	CRC32H R3, R21, R27                        // bb46c31a
	CRC32W R22, R30, R9                        // c94bd61a
	CRC32X R20, R4, R15                        // 8f4cd49a

{"Name":"CRC32B, CRC32H, CRC32W, CRC32X","Bits":"0|0|0|1|1|0|1|0|1|1|0|Rm:5|0|1|0|0|00:2|Rn:5|Rd:5","Arch":"CRC32B variant","Syntax":"CRC32B <Wd>, <Wn>, <Wm>","Code":"","Alias":""},
{"Name":"CRC32B, CRC32H, CRC32W, CRC32X","Bits":"0|0|0|1|1|0|1|0|1|1|0|Rm:5|0|1|0|0|01:2|Rn:5|Rd:5","Arch":"CRC32H variant","Syntax":"CRC32H <Wd>, <Wn>, <Wm>","Code":"","Alias":""},

	CRC32B (BX), DX                         // f20f38f013 or f2480f38f013
	CRC32B (R11), DX                        // f2410f38f013 or f2490f38f013
	CRC32B DL, DX                           // f20f38f0d2 or f2480f38f0d2
	CRC32B R11, DX                          // f2410f38f0d3 or f2490f38f0d3
	CRC32B (BX), R11                        // f2440f38f01b or f24c0f38f01b