r1 = x1
}

func cmovsetm(cond bool, x int) {
	var x0, x1 int

	if cond {
		x0 = -1
	} else {
		x0 = 0
	}
	// arm64:"CSETM\tNE", -"CSEL"
	r0 = x0

	if cond {
		x1 = 0
	} else {
		x1 = -1
	}
	// arm64:"CSETM\tEQ", -"CSEL"
	r1 = x1
}

func cmovFcmp0(s, t float64, a, b int) {
	var x0, x1, x2, x3, x4, x5 int

	if s < t {
		x0 = a
	} else {

	"CMNW",
	"CMP",
	"CMPW",
	"CNEG",
	"CNEGW",
	"CRC32B",
	"CRC32CB",
	"CRC32CH",
	"CRC32CW",
	"CRC32CX",
	"CRC32H",
	"CRC32W",
	"CRC32X",
	"CSEL",
	"CSELW",
	"CSET",
	"CSETM",
	"CSETMW",
	"CSETW",
	"CSINC",
	"CSINCW",
	"CSINV",
	"CSINVW",
	"CSNEG",
	"CSNEGW",
	"DC",
	"DCPS1",
	"DCPS2",
	"DCPS3",
	"DMB",
	"DRPS",
	"DSB",
	"DWORD",

	CRC32CH:   "CRC32CH",
	CRC32CW:   "CRC32CW",
	CRC32CX:   "CRC32CX",
	CRC32H:    "CRC32H",
	CRC32W:    "CRC32W",
	CRC32X:    "CRC32X",
	CSEL:      "CSEL",
	CSET:      "CSET",
	CSETM:     "CSETM",
	CSINC:     "CSINC",
	CSINV:     "CSINV",
	CSNEG:     "CSNEG",
	DC:        "DC",
	DCPS1:     "DCPS1",
	DCPS2:     "DCPS2",
	DCPS3:     "DCPS3",
	DMB:       "DMB",
	DRPS:      "DRPS",

(XOR x (MVN y)) => (EON x y)
(OR  x (MVN y)) => (ORN x y)
(MVN (XOR x y)) => (EON x y)
(NEG (NEG x)) => x

(CSEL [cc] (MOVDconst [-1]) (MOVDconst [0]) flag) => (CSETM [cc] flag)
(CSEL [cc] (MOVDconst [0]) (MOVDconst [-1]) flag) => (CSETM [arm64Negate(cc)] flag)
(CSEL [cc] x (MOVDconst [0]) flag) => (CSEL0 [cc] x flag)
(CSEL [cc] (MOVDconst [0]) y flag) => (CSEL0 [arm64Negate(cc)] y flag)

	CSET	NV, R2                                           // ERROR "invalid condition"
	CSETMW	AL, R2                                           // ERROR "invalid condition"
	CSETM	NV, R2                                           // ERROR "invalid condition"
	LDP.P	8(R2), (R2, R3)                                  // ERROR "constrained unpredictable behavior"

		{name: "CSNEG", argLength: 3, reg: gp2flags1, asm: "CSNEG", aux: "CCop"}, // auxint(flags) ? arg0 : -arg1
		{name: "CSETM", argLength: 1, reg: readflags, asm: "CSETM", aux: "CCop"}, // auxint(flags) ? -1 : 0

		// function calls

	CSEL GE, R0, R12, R14                      // 0ea08c9a
	CSETW GE, R3                               // e3b79f1a
	CSET LT, R30                               // fea79f9a
	CSETMW VC, R5                              // e5639f5a
	CSETM VS, R4                               // e4739fda
	CSINCW LE, R5, R24, R26                    // bad4981a
	CSINC VS, R26, R16, R17                    // 5167909a
	CSINVW AL, R23, R21, R5                    // e5e2955a

{"Name":"CSETM","Bits":"0|1|0|1|1|0|1|0|1|0|0|1|1|1|1|1|cond:4|0|0|1|1|1|1|1|Rd:5","Arch":"32-bit variant","Syntax":"CSETM <Wd>, <cond>","Code":"","Alias":"This instruction is an alias of the CSINV instruction."},

	v_0 := v.Args[0]
	// match: (CSETM [cc] (InvertFlags cmp))
	// result: (CSETM [arm64Invert(cc)] cmp)
	for {
		cc := auxIntToOp(v.AuxInt)
		if v_0.Op != OpARM64InvertFlags {
			break
		}
		cmp := v_0.Args[0]
		v.reset(OpARM64CSETM)
		v.AuxInt = opToAuxInt(arm64Invert(cc))
		v.AddArg(cmp)
		return true
	}
	// match: (CSETM [cc] flag)
	// cond: ccARM64Eval(cc, flag) > 0

		} else {
			cond -= SPOP_EQ
		}

		r := int(p.Reg)
		var rf int = r
		if p.From3Type() == obj.TYPE_NONE {
			/* CINC/CINV/CNEG or CSET/CSETM*/
			if r == obj.REG_NONE {
				/* CSET/CSETM */
				rf = REGZERO
				r = rf
			}
			cond ^= 1
		} else {
			rf = int(p.GetFrom3().Reg) /* CSEL */
		}

		rt := int(p.To.Reg)