return ((x << 5) & (0xfff << 5)) << 2
}

// ubfx
// merge shifts into ubfx: (x<<lc)>>rc && lc<rc
func ubfx1(x uint64) uint64 {
	// arm64:"UBFX\t[$]1, R[0-9]+, [$]62",-"LSL",-"LSR"
	// s390x:"RISBGZ\t[$]2, [$]63, [$]63,",-"SLD",-"SRD"
	return (x << 1) >> 2
}

// merge shift and zero-extension into ubfx.
func ubfx2(x uint32) uint64 {
	return uint64(x >> 15) // arm64:"UBFX\t[$]15, R[0-9]+, [$]17",-"LSR"
}

	=> (UBFX [armBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
// merge ANDconst and ubfx into ubfx
(ANDconst [c] (UBFX [bfc] x)) && isARM64BFMask(0, c, 0) =>
	(UBFX [armBFAuxInt(bfc.getARM64BFlsb(), min(bfc.getARM64BFwidth(), arm64BFWidth(c, 0)))] x)
(UBFX [bfc] (ANDconst [c] x)) && isARM64BFMask(0, c, 0) && bfc.getARM64BFlsb() + bfc.getARM64BFwidth() <= arm64BFWidth(c, 0) =>
	(UBFX [bfc] x)
// merge ubfx and zerso-extension into ubfx

	"SWPW",
	"SXTB",
	"SXTBW",
	"SXTH",
	"SXTHW",
	"SXTW",
	"SYS",
	"SYSL",
	"TBNZ",
	"TBZ",
	"TLBI",
	"TST",
	"TSTW",
	"UBFIZ",
	"UBFIZW",
	"UBFM",
	"UBFMW",
	"UBFX",
	"UBFXW",
	"UCVTFD",
	"UCVTFS",
	"UCVTFWD",
	"UCVTFWS",
	"UDIV",
	"UDIVW",
	"UMADDL",
	"UMNEGL",
	"UMSUBL",
	"UMULH",
	"UMULL",
	"UREM",
	"UREMW",
	"UXTB",

	UASX_ZZ:           "UASX.ZZ",
	UBFX_EQ:           "UBFX.EQ",
	UBFX_NE:           "UBFX.NE",
	UBFX_CS:           "UBFX.CS",
	UBFX_CC:           "UBFX.CC",
	UBFX_MI:           "UBFX.MI",
	UBFX_PL:           "UBFX.PL",
	UBFX_VS:           "UBFX.VS",
	UBFX_VC:           "UBFX.VC",
	UBFX_HI:           "UBFX.HI",
	UBFX_LS:           "UBFX.LS",
	UBFX_GE:           "UBFX.GE",
	UBFX_LT:           "UBFX.LT",

Examples:

	FMADDD F30, F20, F3, F29    <=>    fmadd d29, d3, d30, d20
	FNMSUBS F7, F25, F7, F22    <=>    fnmsub s22, s7, s7, s25

(4) BFI, BFXIL, SBFIZ, SBFX, UBFIZ, UBFX $<lsb>, <Rn>, $<width>, <Rd>

Examples:

	BFIW $16, R20, $6, R0      <=>    bfi w0, w20, #16, #6
	UBFIZ $34, R26, $5, R20    <=>    ubfiz x20, x26, #34, #5

			break
		}
		v.reset(OpARM64UBFX)
		v.AuxInt = arm64BitFieldToAuxInt(armBFAuxInt(sc, arm64BFWidth(ac, 0)))
		v.AddArg(x)
		return true
	}
	// match: (ANDconst [c] (UBFX [bfc] x))
	// cond: isARM64BFMask(0, c, 0)
	// result: (UBFX [armBFAuxInt(bfc.getARM64BFlsb(), min(bfc.getARM64BFwidth(), arm64BFWidth(c, 0)))] x)
	for {
		c := auxIntToInt64(v.AuxInt)
		if v_0.Op != OpARM64UBFX {
			break
		}

	UADALP:    "UADALP",
	UADDL:     "UADDL",
	UADDL2:    "UADDL2",
	UADDLP:    "UADDLP",
	UADDLV:    "UADDLV",
	UADDW:     "UADDW",
	UADDW2:    "UADDW2",
	UBFIZ:     "UBFIZ",
	UBFM:      "UBFM",
	UBFX:      "UBFX",
	UCVTF:     "UCVTF",
	UDIV:      "UDIV",
	UHADD:     "UHADD",
	UHSUB:     "UHSUB",
	UMADDL:    "UMADDL",
	UMAX:      "UMAX",
	UMAXP:     "UMAXP",
	UMAXV:     "UMAXV",
	UMIN:      "UMIN",

	// s390x:-"MOVW",-"SRD"
	p.b = uint32(x)
}
func store16le(p *struct{ a, b uint16 }, x uint32) {
	// amd64:"MOVL",-"MOVW",-"SHRL"
	// arm64:"MOVW",-"MOVH",-"UBFX"
	// ppc64le:"MOVW",-"MOVH",-"SRW"
	p.a = uint16(x)
	// amd64:-"MOVW",-"SHRL"
	// arm64:-"MOVH",-"UBFX"
	// ppc64le:-"MOVH",-"SRW"
	p.b = uint16(x >> 16)
}
func store16be(p *struct{ a, b uint16 }, x uint32) {
	// ppc64:"MOVW",-"MOVH",-"SRW"

	// 386:"BSWAPL"
	// s390x:"MOVWBR"
	// arm64:"REVW"
	// ppc64x/power10: "BRW"
	return bits.ReverseBytes32(n)
}

func ReverseBytes16(n uint16) uint16 {
	// amd64:"ROLW"
	// arm64:"REV16W",-"UBFX",-"ORR"
	// arm/5:"SLL","SRL","ORR"
	// arm/6:"REV16"
	// arm/7:"REV16"
	// ppc64x/power10: "BRH"
	return bits.ReverseBytes16(n)
}

// --------------------- //
//    bits.RotateLeft    //

			if rno <= uint16(WZR) {
				op += "W"
			}
		}
		args[1], args[2] = args[2], args[1]

	case STLXRB, STLXRH, STXRB, STXRH:
		args[1], args[2] = args[2], args[1]

	case BFI, BFXIL, SBFIZ, SBFX, UBFIZ, UBFX:
		if r, ok := inst.Args[0].(Reg); ok {
			rno := uint16(r)
			if rno <= uint16(WZR) {
				op += "W"
			}
		}
		args[1], args[2], args[3] = args[3], args[1], args[2]

	case LDAXP, LDXP: