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Results 1 - 10 of 23 for LSR (0.07 sec)

  1. src/math/big/arith_arm64.s

    	MOVD.W	-8(R2), R6
    	LSR	R4, R6, R5	// return value
    	LSL	R3, R6, R8	// x[i] << s
    	SUB	$1, R1
    one:	TBZ	$0, R1, two
    	MOVD.W	-8(R2), R6
    	LSR	R4, R6, R7
    	ORR	R8, R7
    	LSL	R3, R6, R8
    	SUB	$1, R1
    	MOVD.W	R7, -8(R0)
    two:
    	TBZ	$1, R1, loop
    	LDP.W	-16(R2), (R6, R7)
    	LSR	R4, R7, R10
    	ORR	R8, R10
    	LSL	R3, R7
    	LSR	R4, R6, R9
    	ORR	R7, R9
    	LSL	R3, R6, R8
    	SUB	$2, R1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 11.8K bytes
    - Viewed (0)
  2. src/runtime/time_windows_arm64.s

    	MUL	R1, R0
    
    	// Code stolen from compiler output for:
    	//
    	//	var x uint64
    	//	func f() (sec uint64, nsec uint32) { return x / 1000000000, uint32(x % 1000000000) }
    	//
    	LSR	$1, R0, R1
    	MOVD	$-8543223759426509416, R2
    	UMULH	R1, R2, R1
    	LSR	$28, R1, R1
    	MOVD	R1, sec+0(FP)
    	MOVD	$1000000000, R2
    	MSUB	R1, R0, R2, R0
    	MOVW	R0, nsec+8(FP)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Sep 07 17:19:45 UTC 2023
    - 906 bytes
    - Viewed (0)
  3. src/crypto/internal/edwards25519/field/fe_arm64.s

    // license that can be found in the LICENSE file.
    
    //go:build !purego
    
    #include "textflag.h"
    
    // carryPropagate works exactly like carryPropagateGeneric and uses the
    // same AND, ADD, and LSR+MADD instructions emitted by the compiler, but
    // avoids loading R0-R4 twice and uses LDP and STP.
    //
    // See https://golang.org/issues/43145 for the main compiler issue.
    //
    // func carryPropagate(v *Element)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 1K bytes
    - Viewed (0)
  4. test/codegen/bitfield.go

    func mask32(x uint32) uint32 {
    	return (x << 29) >> 29 // arm64:"AND\t[$]7, R[0-9]+",-"LSR",-"LSL"
    }
    
    // check 16-bit shift masking
    func mask16(x uint16) uint16 {
    	return (x << 14) >> 14 // arm64:"AND\t[$]3, R[0-9]+",-"LSR",-"LSL"
    }
    
    // check 8-bit shift masking
    func mask8(x uint8) uint8 {
    	return (x << 7) >> 7 // arm64:"AND\t[$]1, R[0-9]+",-"LSR",-"LSL"
    }
    
    func maskshift(x uint64) uint64 {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 23 06:11:32 UTC 2022
    - 9.6K bytes
    - Viewed (0)
  5. test/codegen/shift.go

    	if shift >= 0 && shift < 64 {
    		// arm64:"LSR",-"CSEL"
    		r1 = val64 >> shift
    	}
    	if shift >= 0 && shift < 32 {
    		// arm64:"LSR",-"CSEL"
    		r2 = val32 >> shift
    	}
    	if shift >= 0 && shift < 16 {
    		// arm64:"LSR",-"CSEL"
    		r3 = val16 >> shift
    	}
    	if shift >= 0 && shift < 8 {
    		// arm64:"LSR",-"CSEL"
    		r4 = val8 >> shift
    	}
    	return r1, r2, r3, r4
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 21 18:53:43 UTC 2024
    - 12.7K bytes
    - Viewed (0)
  6. src/crypto/internal/nistec/p256_asm_arm64.s

    	// Only reduce, no multiplications are needed
    	// First reduction step
    	ADDS	acc0<<32, acc1, acc1
    	LSR	$32, acc0, t0
    	MUL	acc0, const1, t1
    	UMULH	acc0, const1, acc0
    	ADCS	t0, acc2
    	ADCS	t1, acc3
    	ADC	$0, acc0
    	// Second reduction step
    	ADDS	acc1<<32, acc2, acc2
    	LSR	$32, acc1, t0
    	MUL	acc1, const1, t1
    	UMULH	acc1, const1, acc1
    	ADCS	t0, acc3
    	ADCS	t1, acc0
    	ADC	$0, acc1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 29.7K bytes
    - Viewed (0)
  7. src/internal/bytealg/indexbyte_arm64.s

    	VAND	V5.B16, V3.B16, V3.B16
    	VAND	V5.B16, V4.B16, V4.B16
    	VADDP	V4.B16, V3.B16, V6.B16 // 256->128
    	VADDP	V6.B16, V6.B16, V6.B16 // 128->64
    	VMOV	V6.D[0], R6
    	// Clear the irrelevant lower bits
    	LSL	$1, R9, R4
    	LSR	R4, R6, R6
    	LSL	R4, R6, R6
    	// The first block can also be the last
    	BLS	masklast
    	// Have we found something already?
    	CBNZ	R6, tail
    
    loop:
    	VLD1.P	(R3), [V1.B16, V2.B16]
    	SUBS	$0x20, R2, R2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Nov 08 20:52:47 UTC 2018
    - 3.3K bytes
    - Viewed (0)
  8. src/math/exp_arm64.s

    	FSUBD	F15, F1, F16	// F16 = y = 1-((lo-(r*c)/(2-c))-hi)
    	// inline Ldexp(y, k), benefit:
    	// 1, no parameter pass overhead.
    	// 2, skip unnecessary checks for Inf/NaN/Zero
    	FMOVD	F16, R0
    	AND	$FracMask, R0, R2	// fraction
    	LSR	$52, R0, R5	// exponent
    	ADD	R1, R5		// R1 = int(k)
    	CMP	$1, R5
    	BGE	normal
    	ADD	$52, R5		// denormal
    	MOVD	$C1, R8
    	FMOVD	R8, F1		// m = 2**-52
    normal:
    	ORR	R5<<52, R2, R0
    	FMOVD	R0, F0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 5.4K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/arm64/anames.go

    	"LDORLB",
    	"LDORLD",
    	"LDORLH",
    	"LDORLW",
    	"LDORW",
    	"LDP",
    	"LDPSW",
    	"LDPW",
    	"LDXP",
    	"LDXPW",
    	"LDXR",
    	"LDXRB",
    	"LDXRH",
    	"LDXRW",
    	"LSL",
    	"LSLW",
    	"LSR",
    	"LSRW",
    	"MADD",
    	"MADDW",
    	"MNEG",
    	"MNEGW",
    	"MOVB",
    	"MOVBU",
    	"MOVD",
    	"MOVH",
    	"MOVHU",
    	"MOVK",
    	"MOVKW",
    	"MOVN",
    	"MOVNW",
    	"MOVP",
    	"MOVPD",
    	"MOVPQ",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 18 01:40:37 UTC 2023
    - 5.4K bytes
    - Viewed (0)
  10. test/codegen/arithmetic.go

    func LenDiv1(a []int) int {
    	// 386:"SHRL\t[$]10"
    	// amd64:"SHRQ\t[$]10"
    	// arm64:"LSR\t[$]10",-"SDIV"
    	// arm:"SRL\t[$]10",-".*udiv"
    	// ppc64x:"SRD"\t[$]10"
    	return len(a) / 1024
    }
    
    func LenDiv2(s string) int {
    	// 386:"SHRL\t[$]11"
    	// amd64:"SHRQ\t[$]11"
    	// arm64:"LSR\t[$]11",-"SDIV"
    	// arm:"SRL\t[$]11",-".*udiv"
    	// ppc64x:"SRD\t[$]11"
    	return len(s) / (4097 >> 1)
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 15:28:00 UTC 2024
    - 15.2K bytes
    - Viewed (0)
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