"LDORALH",
	"LDORALW",
	"LDORAW",
	"LDORB",
	"LDORD",
	"LDORH",
	"LDORLB",
	"LDORLD",
	"LDORLH",
	"LDORLW",
	"LDORW",
	"LDP",
	"LDPSW",
	"LDPW",
	"LDXP",
	"LDXPW",
	"LDXR",
	"LDXRB",
	"LDXRH",
	"LDXRW",
	"LSL",
	"LSLW",
	"LSR",
	"LSRW",
	"MADD",
	"MADDW",
	"MNEG",
	"MNEGW",
	"MOVB",
	"MOVBU",
	"MOVD",
	"MOVH",
	"MOVHU",
	"MOVK",

	// LDXP <Xt>, <Xt2>, [<Xn|SP>{, #0}]
	{0xffe08000, 0xc8600000, LDXP, instArgs{arg_Xt, arg_Xt2, arg_Xns_mem}, nil},
	// LDXR <Wt>, [<Xn|SP>{, #0}]
	{0xffe08000, 0x88400000, LDXR, instArgs{arg_Wt, arg_Xns_mem}, nil},
	// LDXR <Xt>, [<Xn|SP>{, #0}]
	{0xffe08000, 0xc8400000, LDXR, instArgs{arg_Xt, arg_Xns_mem}, nil},
	// LDXRB <Wt>, [<Xn|SP>{, #0}]
	{0xffe08000, 0x08400000, LDXRB, instArgs{arg_Wt, arg_Xns_mem}, nil},

	//TODO LDURSW 0x48(R6), R20                // d48084b8
	LDXPW (R24), (R23, R11)                    // 172f7f88
	LDXP (R0), (R16, R13)                      // 10347fc8
	LDXRW (RSP), R30                           // fe7f5f88
	LDXR (R27), R12                            // 6c7f5fc8
	LDXRB (R0), R4                             // 047c5f08
	LDXRH (R12), R26                           // 9a7d5f48
	LSLW R11, R10, R15                         // 4f21cb1a

{"Name":"LDXR","Bits":"10:2|0|0|1|0|0|0|0|1|0|(1)|(1)|(1)|(1)|(1)|0|(1)|(1)|(1)|(1)|(1)|Rn:5|Rt:5","Arch":"32-bit variant","Syntax":"LDXR <Wt>, [<Xn|SP>{,#0}]","Code":"","Alias":""},
{"Name":"LDXR","Bits":"11:2|0|0|1|0|0|0|0|1|0|(1)|(1)|(1)|(1)|(1)|0|(1)|(1)|(1)|(1)|(1)|Rn:5|Rt:5","Arch":"64-bit variant","Syntax":"LDXR <Xt>, [<Xn|SP>{,#0}]","Code":"","Alias":""},

			c.ctxt.Diag("illegal FCCMP\n%v", p)
			break
		}
		rt := int(p.GetFrom3().Reg)
		o1 |= uint32(rf&31)<<16 | uint32(cond&15)<<12 | uint32(rt&31)<<5 | uint32(nzcv)

	case 58: /* ldar/ldarb/ldarh/ldaxp/ldxp/ldaxr/ldxr */
		o1 = c.opload(p, p.As)

		o1 |= 0x1F << 16
		o1 |= uint32(p.From.Reg&31) << 5
		if p.As == ALDXP || p.As == ALDXPW || p.As == ALDAXP || p.As == ALDAXPW {
			if int(p.To.Reg) == int(p.To.Offset) {