"UBFM",
	"UBFMW",
	"UBFX",
	"UBFXW",
	"UCVTFD",
	"UCVTFS",
	"UCVTFWD",
	"UCVTFWS",
	"UDIV",
	"UDIVW",
	"UMADDL",
	"UMNEGL",
	"UMSUBL",
	"UMULH",
	"UMULL",
	"UREM",
	"UREMW",
	"UXTB",
	"UXTBW",
	"UXTH",
	"UXTHW",
	"UXTW",
	"VADD",
	"VADDP",
	"VADDV",
	"VAND",
	"VBCAX",
	"VBIF",
	"VBIT",
	"VBSL",
	"VCMEQ",
	"VCMTST",

// --------------- //

func Div(hi, lo, x uint) (q, r uint) {
	// amd64:"DIVQ"
	return bits.Div(hi, lo, x)
}

func Div32(hi, lo, x uint32) (q, r uint32) {
	// arm64:"ORR","UDIV","MSUB",-"UREM"
	return bits.Div32(hi, lo, x)
}

func Div64(hi, lo, x uint64) (q, r uint64) {
	// amd64:"DIVQ"
	return bits.Div64(hi, lo, x)
}

func Div64degenerate(x uint64) (q, r uint64) {
	// amd64:-"DIVQ"

(BitRev16   x) => (SRLconst [48] (RBIT <typ.UInt64> x))
(BitRev8    x) => (SRLconst [56] (RBIT <typ.UInt64> x))

// In fact, UMOD will be translated into UREM instruction, and UREM is originally translated into
// UDIV and MSUB instructions. But if there is already an identical UDIV instruction just before or
// after UREM (case like quo, rem := z/y, z%y), then the second UDIV instruction becomes redundant.

		{name: "MOD", argLength: 2, reg: gp21, asm: "REM"},                                                            // arg0 % arg1, signed
		{name: "UMOD", argLength: 2, reg: gp21, asm: "UREM"},                                                          // arg0 % arg1, unsigned
		{name: "MODW", argLength: 2, reg: gp21, asm: "REMW"},                                                          // arg0 % arg1, signed, 32 bit