if a.Type == obj.TYPE_MEM {
				return errors.New("invalid shift for the register offset addressing mode")
			}
			a.Reg = arm64.REG_SXTH + Rnum
		case "SXTW":
			if a.Type == obj.TYPE_MEM {
				a.Index = arm64.REG_SXTW + Rnum
			} else {
				a.Reg = arm64.REG_SXTW + Rnum
			}
		case "SXTX":
			if a.Type == obj.TYPE_MEM {
				a.Index = arm64.REG_SXTX + Rnum
			} else {
				a.Reg = arm64.REG_SXTX + Rnum
			}

	MOVD.W -134(R0), R29                       // 1dac57f8
	MOVWU 4156(R1), R25                        // 393c50b9
	MOVD 14616(R10), R9                        // 498d5cf9
	MOVWU (R4)(R12.SXTW<<2), R7                // 87d86cb8
	MOVD (R7)(R11.UXTW<<3), R25                // f9586bf8
	MOVBU.P 42(R2), R12                        // 4ca44238
	MOVBU.W -27(R2), R14                       // 4e5c5e38

	MOVW	R8, (R2)(R3.UXTW<<2)            // 485823b8
	MOVW	R7, (R3)(R4.SXTW)               // 67c824b8
	MOVB	R4, (R2)(R6.SXTX)               // 44e82638
	MOVB	R8, (R3)(R9.UXTW)               // 68482938
	MOVB	R10, (R5)(R8)                   // aa682838
	MOVB	R10, (R5)(R8*1)                 // aa682838
	MOVH	R11, (R2)(R7.SXTW<<1)           // 4bd82778
	MOVH	R5, (R1)(R2<<1)                 // 25782278

	MOVWU	(R5)(R4.UXTW<<3), R10                            // ERROR "invalid index shift amount"
	MOVWU	(R5)(R4<<1), R10                                 // ERROR "invalid index shift amount"
	MOVB	(R5)(R4.SXTW<<5), R10                            // ERROR "invalid index shift amount"
	MOVH	R5, (R6)(R2<<3)                                  // ERROR "invalid index shift amount"

<code>R0.SXTB&lt;&lt;imm</code>: left shift the result of <code>R0.SXTB</code> by <code>imm</code> bits.
The <code>imm</code> value can be 0, 1, 2, 3, or 4.
The other extensions include <code>SXTH</code> (16-bit), <code>SXTW</code> (32-bit), and <code>SXTX</code> (64-bit).
</li>

<li>
<code>(R5, R6)</code>: Register pair for <code>LDAXP</code>/<code>LDP</code>/<code>LDXP</code>/<code>STLXP</code>/<code>STP</code>/<code>STP</code>.
</li>