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Results 1 - 3 of 3 for TBNZ (0.17 sec)
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src/cmd/asm/internal/arch/arm64.go
"BHI": true, "BLS": true, "BGE": true, "BLT": true, "BGT": true, "BLE": true, "CALL": true, "CBZ": true, "CBZW": true, "CBNZ": true, "CBNZW": true, "JMP": true, "TBNZ": true, "TBZ": true, // ADR isn't really a jump, but it takes a PC or label reference, // which needs to patched like a jump. "ADR": true, "ADRP": true, } func jumpArm64(word string) bool {
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Fri Feb 14 15:13:11 UTC 2025 - 10.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
BL 1(PC) // CALL 1(PC) BL (R2) // CALL (R2) BL foo(SB) // CALL foo(SB) BL bar<>(SB) // CALL bar<>(SB) B foo(SB) // JMP foo(SB) BEQ 1(PC) BEQ 2(PC) TBZ $1, R1, 2(PC) TBNZ $2, R2, 2(PC) JMP foo(SB) CALL foo(SB) // ADR ADR next, R11 // ADR R11 // 2b000010 next: NOP ADR -2(PC), R10 // 0a000010 ADR 2(PC), R16 // 10000010
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Mar 26 10:48:50 UTC 2025 - 95.3K bytes - Viewed (0) -
lib/fips140/v1.0.0.zip
TEXT ·expandKeyAsm(SB),NOSPLIT,$0 MOVD nr+0(FP), R8 MOVD key+8(FP), R9 MOVD enc+16(FP), R10 MOVD dec+24(FP), R11 LDP rotInvSRows<>(SB), (R0, R1) VMOV R0, V3.D[0] VMOV R1, V3.D[1] VEOR V0.B16, V0.B16, V0.B16 // All zeroes MOVW $1, R13 TBZ $1, R8, ks192 TBNZ $2, R8, ks256 LDPW (R9), (R4, R5) LDPW 8(R9), (R6, R7) STPW.P (R4, R5), 8(R10) STPW.P (R6, R7), 8(R10) MOVW $0x1b, R14 ks128Loop: VMOV R7, V2.S[0] WORD $0x4E030042 // TBL V3.B16, [V2.B16], V2.B16 AESE V0.B16, V2.B16 // Use AES to compute the SBOX EORW...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0)