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Results 1 - 7 of 7 for MOVL (0.02 sec)

  1. src/cmd/asm/internal/asm/testdata/386enc.s

    	MOVL 2147483648(AX), AX  // 8b8000000080
    	MOVL -2147483648(AX), AX // 8b8000000080
    	ADDL 2147483648(AX), AX  // 038000000080
    	ADDL -2147483648(AX), AX // 038000000080
    	// Make sure MOV CR/DR continues to work after changing its movtabs.
    	MOVL CR0, AX // 0f20c0
    	MOVL CR0, DX // 0f20c2
    	MOVL CR4, DI // 0f20e7
    	MOVL AX, CR0 // 0f22c0
    	MOVL DX, CR0 // 0f22c2
    	MOVL DI, CR4 // 0f22e7
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 1.2K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/386.s

    	NOP
    	NOP	AX
    	NOP	foo+4(SB)
    
    // LTYPES spec5	{ outcode(int($1), &$2); }
    	SHLL	$4, BX
    	SHLL	$4, foo+4(SB)
    	SHLL	$4, foo+4(SB):AX // SHLL $4, AX, foo+4(SB)
    
    // LTYPEM spec6	{ outcode(int($1), &$2); }
    	MOVL	AX, BX
    	MOVL	$4, BX
    
    // LTYPEI spec7	{ outcode(int($1), &$2); }
    	IMULL	AX
    	IMULL	$4, CX
    	IMULL	AX, BX
    
    // LTYPEXC spec9	{ outcode(int($1), &$2); }
    	CMPPD	X0, X1, 4
    	CMPPD	foo+4(SB), X1, 4
    
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Apr 09 18:57:21 UTC 2019
    - 2K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/amd64.s

    // LTYPES spec5	{ outcode($1, &$2); }
    	SHLL	CX, R12
    	SHLL	CX, foo+4(SB)
    	// Old syntax, still accepted:
    	SHLL	CX, R11:AX // SHLL CX, AX, R11
    
    // LTYPEM spec6	{ outcode($1, &$2); }
    	MOVL	AX, R11
    	MOVL	$4, R11
    //	MOVL	AX, 0(AX):DS // no longer works - did it ever?
    
    // LTYPEI spec7	{ outcode($1, &$2); }
    	IMULB	DX
    	IMULW	DX, BX
    	IMULL	R11, R12
    	IMULQ	foo+4(SB), R11
    
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Apr 09 18:57:21 UTC 2019
    - 3.3K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/amd64error.s

    // Copyright 2016 The Go Authors. All rights reserved.
    // Use of this source code is governed by a BSD-style
    // license that can be found in the LICENSE file.
    
    TEXT errors(SB),$0
    	MOVL	foo<>(SB)(AX), AX	// ERROR "invalid instruction"
    	MOVL	(AX)(SP*1), AX		// ERROR "invalid instruction"
    	EXTRACTPS $4, X2, (BX)          // ERROR "invalid instruction"
    	EXTRACTPS $-1, X2, (BX)         // ERROR "invalid instruction"
    	// VSIB addressing does not permit non-vector (X/Y)
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Jun 14 00:03:57 UTC 2023
    - 8.9K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/amd64dynlinkerror.s

    // Test to make sure that if we use R15 after it is clobbered by
    // a global variable access while dynamic linking, we get an error.
    // See issue 43661.
    
    TEXT ·a1(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	MOVL $0, R15
    	RET
    TEXT ·a2(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	MOVQ $0, R15
    	RET
    TEXT ·a3(SB), 0, $0-0
    	CMPL runtime·writeBarrier(SB), $0
    	XORL R15, R15
    	RET
    TEXT ·a4(SB), 0, $0-0
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Mar 15 20:45:41 UTC 2023
    - 4.8K bytes
    - Viewed (0)
  6. doc/asm.html

    <p>
    For example, the sequence to load <code>g</code> and <code>m</code>
    using <code>CX</code> looks like this:
    </p>
    
    <pre>
    #include "go_tls.h"
    #include "go_asm.h"
    ...
    get_tls(CX)
    MOVL	g(CX), AX     // Move g into AX.
    MOVL	g_m(AX), BX   // Move g.m into BX.
    </pre>
    
    <p>
    The <code>get_tls</code> macro is also defined on <a href="#amd64">amd64</a>.
    </p>
    
    <p>
    Addressing modes:
    </p>
    
    <ul>
    
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Nov 28 19:15:27 UTC 2023
    - 36.3K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	//TODO: MOVL (BX), SS                   // 8e13
    	//TODO: MOVL (R11), SS                  // 418e13
    	//TODO: MOVL DX, SS                     // 8ed2
    	//TODO: MOVL R11, SS                    // 418ed3
    	//TODO: MOVL (BX), DS                   // 8e1b
    	//TODO: MOVL (R11), DS                  // 418e1b
    	//TODO: MOVL DX, DS                     // 8eda
    	//TODO: MOVL R11, DS                    // 418edb
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (1)
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