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Results 1 - 3 of 3 for teq (0.03 sec)

  1. src/cmd/internal/obj/loong64/anames.go

    	"REMU",
    	"RFE",
    	"SC",
    	"SCV",
    	"SGT",
    	"SGTU",
    	"SLL",
    	"SQRTD",
    	"SQRTF",
    	"SRA",
    	"SRL",
    	"ROTR",
    	"SUB",
    	"SUBD",
    	"SUBF",
    	"SUBU",
    	"SUBW",
    	"DBAR",
    	"SYSCALL",
    	"TEQ",
    	"TNE",
    	"WORD",
    	"XOR",
    	"MASKEQZ",
    	"MASKNEZ",
    	"MOVV",
    	"MOVVL",
    	"MOVVR",
    	"SLLV",
    	"SRAV",
    	"SRLV",
    	"ROTRV",
    	"DIVV",
    	"DIVVU",
    	"REMV",
    	"REMVU",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/loong64/asm.go

    		o2 = OP_16IRR(c.opirr(-ASRLV), uint32(32)&0x3f, uint32(p.To.Reg), uint32(p.To.Reg))
    
    	case 15: // teq $c r,r
    		v := c.regoff(&p.From)
    		r := int(p.Reg)
    		if r == 0 {
    			r = REGZERO
    		}
    		/*
    			teq c, r1, r2
    			fallthrough
    			==>
    			bne r1, r2, 2
    			break c
    			fallthrough
    		*/
    		if p.As == ATEQ {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 61.8K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/opGen.go

    		argLen:  1,
    		asm:     arm.ATST,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
    			},
    		},
    	},
    	{
    		name:        "TEQ",
    		argLen:      2,
    		commutative: true,
    		asm:         arm.ATEQ,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 22527}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 g R12 R14
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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