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Results 21 - 30 of 58 for MOVW (0.61 sec)
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src/cmd/vendor/golang.org/x/sys/unix/asm_zos_s390x.s
BL runtimeĀ·save_g(SB) // Save g and stack pointer MOVW PSALAA, R8 MOVD LCA64(R8), R8 MOVD SAVSTACK_ASYNC(R8), R9 MOVD R15, 0(R9) MOVD argv+8(FP), R1 // Move function arguments into registers MOVD dsa+16(FP), g MOVD fnptr+0(FP), R15 BYTE $0x0D // Branch to function BYTE $0xEF BL runtimeĀ·load_g(SB) // Restore g and stack pointer MOVW PSALAA, R8 MOVD LCA64(R8), R8 MOVD SAVSTACK_ASYNC(R8), R9
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 08 16:12:58 UTC 2024 - 11.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
MOVD $1234567, R5 // 6405001260a5d687 or 0600001238a0d687 MOVW $1, R3 // 38600001 MOVW $-1, R4 // 3880ffff MOVW $65535, R5 // 6005ffff MOVW $65536, R6 // 3cc00001 MOVW $-32767, R5 // 38a08001 MOVW $-32768, R6 // 38c08000 MOVW $1234567, R5 // 6405001260a5d687 or 0600001238a0d687 // Hex constant 0x80000001
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64error.s
MOV $8(SP), (X5) // ERROR "address load must target register" MOVB $8(SP), X5 // ERROR "unsupported address load" MOVH $8(SP), X5 // ERROR "unsupported address load" MOVW $8(SP), X5 // ERROR "unsupported address load" MOVF $8(SP), X5 // ERROR "unsupported address load" MOV $1234, 0(SP) // ERROR "constant load must target register"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sun Apr 07 03:32:27 UTC 2024 - 2.8K bytes - Viewed (0) -
test/codegen/shift.go
func lshConst32x64(v int32) int32 { // ppc64x:"SLW" // riscv64:"SLLI",-"AND",-"SLTIU", -"MOVW" return v << uint64(29) } func rshConst32Ux64(v uint32) uint32 { // ppc64x:"SRW" // riscv64:"SRLIW",-"AND",-"SLTIU", -"MOVW" return v >> uint64(29) } func rshConst32x64(v int32) int32 { // ppc64x:"SRAW" // riscv64:"SRAIW",-"OR",-"SLTIU", -"MOVW" return v >> uint64(29) } func lshConst64x32(v int64) int64 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 21 18:53:43 UTC 2024 - 12.7K bytes - Viewed (0) -
test/codegen/rotate.go
a += bits.RotateLeft64(x, 10) return a } func rot32(x uint32) uint32 { var a uint32 // amd64:"ROLL\t[$]7" // arm:"MOVW\tR\\d+@>25" // ppc64x:"ROTLW\t[$]7" // loong64: "ROTR\t[$]25" // riscv64: "RORIW\t[$]25" a += x<<7 | x>>25 // amd64:`ROLL\t[$]8` // arm:"MOVW\tR\\d+@>24" // arm64:"RORW\t[$]24" // s390x:"RLL\t[$]8" // ppc64x:"ROTLW\t[$]8" // loong64: "ROTR\t[$]24" // riscv64: "RORIW\t[$]24"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
MOVH (X5), X6 // 03930200 MOVH 4(X5), X6 // 03934200 MOVW (X5), X6 // 03a30200 MOVW 4(X5), X6 // 03a34200 MOV X5, (X6) // 23305300 MOV X5, 4(X6) // 23325300 MOVB X5, (X6) // 23005300 MOVB X5, 4(X6) // 23025300 MOVH X5, (X6) // 23105300 MOVH X5, 4(X6) // 23125300 MOVW X5, (X6) // 23205300 MOVW X5, 4(X6) // 23225300 MOVB X5, X6 // 1393820313538343 or 13934260
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 22 04:42:21 UTC 2024 - 16.7K bytes - Viewed (0) -
src/internal/runtime/syscall/asm_linux_loong64.s
MOVV R4, R11 // syscall entry MOVV R5, R4 MOVV R6, R5 MOVV R7, R6 MOVV R8, R7 MOVV R9, R8 MOVV R10, R9 SYSCALL MOVV R0, R5 // r2 is not used. Always set to 0. MOVW $-4096, R12 BGEU R12, R4, ok SUBVU R4, R0, R6 // errno MOVV $-1, R4 // r1 RET ok: // r1 already in R4 MOVV R0, R6 // errno
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 1013 bytes - Viewed (0) -
src/cmd/internal/obj/loong64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 1.9K bytes - Viewed (0) -
src/cmd/internal/obj/riscv/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 2.9K bytes - Viewed (0) -
src/hash/crc32/crc32_ppc64le.s
MOVWZ crc+0(FP), R3 // incoming crc MOVD table8+8(FP), R4 // *Table MOVD p+16(FP), R5 MOVD p_len+24(FP), R6 // p len CMP $0,R6 // len == 0? BNE start MOVW R3,ret+40(FP) // return crc RET start: NOR R3,R3,R7 // ^crc MOVWZ R7,R7 // 32 bits CMP R6,$16 MOVD R6,CTR BLT short SRAD $3,R6,R8 // 8 byte chunks MOVD R8,CTR
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 06 12:09:50 UTC 2024 - 13.1K bytes - Viewed (0)