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Results 1 - 10 of 20 for NEGW (0.15 sec)
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src/cmd/internal/obj/riscv/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Mar 20 14:19:33 UTC 2024 - 2.9K bytes - Viewed (0) -
src/cmd/internal/obj/mips/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 1.4K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 1.9K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 18 01:40:37 UTC 2023 - 5.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
MOVB X5, tls(SB) // b70f00009b8f0f00b38f4f0023805f00 // NOT pseudo-instruction NOT X5 // 93c2f2ff NOT X5, X6 // 13c3f2ff // NEG/NEGW pseudo-instructions NEG X5 // b3025040 NEG X5, X6 // 33035040 NEGW X5 // bb025040 NEGW X5, X6 // 3b035040 // This jumps to the second instruction in the function (the // first instruction is an invisible stack pointer adjustment).
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 22 04:42:21 UTC 2024 - 16.7K bytes - Viewed (0) -
src/cmd/internal/obj/s390x/anames.go
"DIVWU", "DIVD", "DIVDU", "MODW", "MODWU", "MODD", "MODDU", "MULLW", "MULLD", "MULHD", "MULHDU", "MLGR", "SUB", "SUBC", "SUBV", "SUBE", "SUBW", "NEG", "NEGW", "MOVWBR", "MOVB", "MOVBZ", "MOVH", "MOVHBR", "MOVHZ", "MOVW", "MOVWZ", "MOVD", "MOVDBR", "MOVDEQ", "MOVDGE", "MOVDGT", "MOVDLE", "MOVDLT", "MOVDNE", "LOCR",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Sep 05 16:41:03 UTC 2023 - 7.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
MODWU R1, R2, R3 // a7a90000b90400b2b99700a1b904003a NEG R1 // b9030011 NEG R1, R2 // b9030021 NEGW R1 // b9130011 NEGW R1, R2 // b9130021 FLOGR R2, R2 // b9830022 POPCNT R3, R4 // b9e10043 AND R1, R2 // b9800021 AND R1, R2, R3 // b9e42031
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 22 03:55:32 UTC 2023 - 21.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips.s
RET // More JMP/JAL cases, and canonical names JMP, CALL. JAL foo(SB) // CALL foo(SB) BEQ R1, 2(PC) JMP foo(SB) CALL foo(SB) RET foo(SB) // unary operation NEGW R1, R2 // 00011023 CLZ R1, R2 // 70221020 CLO R1, R2 // 70221021 WSBH R1, R2 // 7c0110a0 SEB R1, R2 // 7c011420 SEH R1, R2 // 7c011620 // to (Hi, Lo) MADD R2, R1 // 70220000
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 6.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
ADDV R4, R5, R6 // a6901000 AND R4, R5, R6 // a6901400 SUB R4, R5 // a5101100 SUBV R4, R5 // a5901100 ADD R4, R5 // a5101000 ADDV R4, R5 // a5901000 AND R4, R5 // a5901400 NEGW R4, R5 // 05101100 NEGV R4, R5 // 05901100 SLL R4, R5 // a5101700 SLL R4, R5, R6 // a6101700 SRL R4, R5 // a5901700 SRL R4, R5, R6 // a6901700 SRA R4, R5 // a5101800 SRA R4, R5, R6 // a6101800
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 8.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64.rules
(MOVBUreg x:(Select0 (LoweredAtomicCas64 _ _ _ _))) => (MOVDreg x) // Avoid sign extension after word arithmetic. (MOVWreg x:(ADDIW _)) => (MOVDreg x) (MOVWreg x:(SUBW _ _)) => (MOVDreg x) (MOVWreg x:(NEGW _)) => (MOVDreg x) (MOVWreg x:(MULW _ _)) => (MOVDreg x) (MOVWreg x:(DIVW _ _)) => (MOVDreg x) (MOVWreg x:(DIVUW _ _)) => (MOVDreg x) (MOVWreg x:(REMW _ _)) => (MOVDreg x) (MOVWreg x:(REMUW _ _)) => (MOVDreg x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 40.3K bytes - Viewed (0)