SLLIW	$32, X5, X6			// ERROR "immediate out of range 0 to 31"
	SRLIW	$32, X5, X6			// ERROR "immediate out of range 0 to 31"
	SRAIW	$32, X5, X6			// ERROR "immediate out of range 0 to 31"
	RORIW	$-1, X5, X6			// ERROR "immediate out of range 0 to 31"
	SLLIW	$-1, X5, X6			// ERROR "immediate out of range 0 to 31"
	SRLIW	$-1, X5, X6			// ERROR "immediate out of range 0 to 31"

	"BNE",
	"BLT",
	"BLTU",
	"BGE",
	"BGEU",
	"LW",
	"LWU",
	"LH",
	"LHU",
	"LB",
	"LBU",
	"SW",
	"SH",
	"SB",
	"FENCE",
	"FENCETSO",
	"PAUSE",
	"ADDIW",
	"SLLIW",
	"SRLIW",
	"SRAIW",
	"ADDW",
	"SLLW",
	"SRLW",
	"SUBW",
	"SRAW",
	"LD",
	"SD",
	"MUL",
	"MULH",
	"MULHU",
	"MULHSU",
	"MULW",
	"DIV",
	"DIVU",
	"REM",
	"REMU",
	"DIVW",
	"DIVUW",

	ADDIW	$1, X5, X6				// 1b831200
	SLLIW	$1, X5, X6				// 1b931200
	SRLIW	$1, X5, X6				// 1bd31200
	SRAIW	$1, X5, X6				// 1bd31240
	ADDW	X5, X6, X7				// bb035300
	SLLW	X5, X6, X7				// bb135300
	SRLW	X5, X6, X7				// bb535300
	SUBW	X5, X6, X7				// bb035340
	SRAW	X5, X6, X7				// bb535340
	ADDIW	$1, X6					// 1b031300
	SLLIW	$1, X6					// 1b131300
	SRLIW	$1, X6					// 1b531300
	SRAIW	$1, X6					// 1b531340

		{name: "SRLI", argLength: 1, reg: gp11, asm: "SRLI", aux: "Int64"},   // arg0 >> auxint, shift amount 0-63, logical right shift
		{name: "SRLIW", argLength: 1, reg: gp11, asm: "SRLIW", aux: "Int64"}, // arg0 >> auxint, shift amount 0-31, logical right shift of 32 bit value, sign extended to 64 bits

		// Bitwise ops

}

func lshConst32x64(v int32) int32 {
	// ppc64x:"SLW"
	// riscv64:"SLLI",-"AND",-"SLTIU", -"MOVW"
	return v << uint64(29)
}

func rshConst32Ux64(v uint32) uint32 {
	// ppc64x:"SRW"
	// riscv64:"SRLIW",-"AND",-"SLTIU", -"MOVW"
	return v >> uint64(29)
}

func rshConst32x64(v int32) int32 {
	// ppc64x:"SRAW"
	// riscv64:"SRAIW",-"OR",-"SLTIU", -"MOVW"
	return v >> uint64(29)
}

// Avoid unnecessary zero and sign extension when right shifting.
(SRAI <t> [x] (MOVWreg  y)) && x >= 0 && x <= 31 => (SRAIW <t> [int64(x)] y)
(SRLI <t> [x] (MOVWUreg y)) && x >= 0 && x <= 31 => (SRLIW <t> [int64(x)] y)

// Replace right shifts that exceed size of signed type.
(SRAI <t> [x] (MOVBreg y)) && x >=  8 => (SRAI  [63] (SLLI <t> [56] y))
(SRAI <t> [x] (MOVHreg y)) && x >= 16 => (SRAI  [63] (SLLI <t> [48] y))

		return true
	}
	return false
}
func rewriteValueRISCV64_OpRISCV64SRLI(v *Value) bool {
	v_0 := v.Args[0]
	// match: (SRLI <t> [x] (MOVWUreg y))
	// cond: x >= 0 && x <= 31
	// result: (SRLIW <t> [int64(x)] y)
	for {
		t := v.Type
		x := auxIntToInt64(v.AuxInt)
		if v_0.Op != OpRISCV64MOVWUreg {
			break
		}
		y := v_0.Args[0]
		if !(x >= 0 && x <= 31) {
			break
		}

			},
			outputs: []outputInfo{
				{0, 1006632944}, // X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X28 X29 X30
			},
		},
	},
	{
		name:    "SRLIW",
		auxType: auxInt64,
		argLen:  1,
		asm:     riscv.ASRLIW,
		reg: regInfo{
			inputs: []inputInfo{