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Results 1 - 8 of 8 for ADDW (0.82 sec)
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src/cmd/asm/internal/asm/testdata/s390x.s
ADDC $1, R1, R2 // ec21000100db ADDC $-1, R1, R2 // ec21ffff00db ADDC R1, R2, R3 // b9ea1032 ADDW R1, R2 // 1a21 ADDW R1, R2, R3 // b9f81032 ADDW $8192, R1 // a71a2000 ADDW $8192, R1, R2 // ec21200000d8 ADDE R1, R2 // b9880021 SUB R3, R4 // b9090043 SUB R3, R4, R5 // b9e93054
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jul 30 19:29:15 UTC 2025 - 22.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64error.s
ADDL 3395469782(AX), AX // ERROR "offset too large" ADDW 3395469782(AX), AX // ERROR "offset too large" LEAQ 433954697820(AX), AX // ERROR "offset too large" ADDQ 433954697820(AX), AX // ERROR "offset too large" ADDL 433954697820(AX), AX // ERROR "offset too large" ADDW 433954697820(AX), AX // ERROR "offset too large" // Pseudo-registers should not be used as scaled index.
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 8.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
#include "../../../../../runtime/textflag.h" TEXT foo(SB), DUPOK|NOSPLIT, $-8 // arithmetic operations ADDW $1, R2, R3 ADDW R1, R2, R3 ADDW R1, ZR, R3 ADD $1, R2, R3 ADD R1, R2, R3 ADD R1, ZR, R3 ADD $1, R2, R3 ADDW $1, R2 ADDW R1, R2 ADD $1, R2 ADD R1, R2 ADD R1>>11, R2 ADD R1<<22, R2 ADD R1->33, R2
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Mar 26 10:48:50 UTC 2025 - 95.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
ADCSW R9, R21, R6 // a602093a ADCS R23, R22, R22 // d60217ba ADDW R5.UXTH, R8, R9 // 0921250b ADD R8.SXTB<<3, R23, R14 // ee8e288b ADDW $3076, R17, R3 // 23123011 ADDW $(3076<<12), R17, R3 // ADDW $12599296, R17, R3 // 23127011 ADD $2280, R25, R11 // 2ba32391
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
ADDW $7, (R11) // 6641830307 ADDW $7, DX // 6683c207 ADDW $7, R11 // 664183c307 ADDW DX, (BX) // 660113 ADDW R11, (BX) // 6644011b ADDW DX, (R11) // 66410113 ADDW R11, (R11) // 6645011b
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (1) -
src/cmd/asm/internal/asm/testdata/riscv64.s
SRLIW $1, X5, X6 // 1bd31200 SRAIW $1, X5, X6 // 1bd31240 ADDW X5, X6, X7 // bb035300 SLLW X5, X6, X7 // bb135300 SRLW X5, X6, X7 // bb535300 SUBW X5, X6, X7 // bb035340 SRAW X5, X6, X7 // bb535340 ADDIW $1, X6 // 1b031300 SLLIW $1, X6 // 1b131300 SRLIW $1, X6 // 1b531300 SRAIW $1, X6 // 1b531340 ADDW X5, X7 // bb835300 SLLW X5, X7 // bb935300
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed May 21 14:19:19 UTC 2025 - 49.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64error.s
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Mar 26 10:48:50 UTC 2025 - 37.9K bytes - Viewed (0) -
lib/fips140/v1.0.0.zip
or equal to the dst size. MOVD dst_len+40(FP), R4 CMP R0, R4 BGT crash MOVD R2, R4 MOVD R2, R6 MOVD R2, R8 MOVD R3, R5 MOVD R3, R7 MOVD R3, R9 ADDW $1, R5 ADDW $2, R7 ADDW $3, R9 incr: CMP R0, $64 BLT tail STMG R2, R9, (R1) ADDW $4, R3 ADDW $4, R5 ADDW $4, R7 ADDW $4, R9 MOVD $64(R1), R1 SUB $64, R0 BR incr tail: CMP R0, $0 BEQ crypt STMG R2, R3, (R1) ADDW $1, R3 MOVD $16(R1), R1 SUB $16, R0 BR tail crypt: STMG R2, R3, (R12) // update next counter value MOVD fn+0(FP), R0 // function code (encryption)...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0)