panic("decompressor already registered")
	}
}

// RegisterCompressor registers custom compressors for a specified method ID.
// The common methods [Store] and [Deflate] are built in.
func RegisterCompressor(method uint16, comp Compressor) {
	if _, dup := compressors.LoadOrStore(method, comp); dup {
		panic("compressor already registered")
	}
}

func compressor(method uint16) Compressor {

    registry.unregister(s1);

    assertThrows(IllegalArgumentException.class, () -> registry.unregister(s1));
  }

  public void testGetSubscribers() {
    assertEquals(0, Iterators.size(registry.getSubscribers("")));

    registry.register(new StringSubscriber());
    assertEquals(1, Iterators.size(registry.getSubscribers("")));

    registry.register(new StringSubscriber());

#
map:{
    #; commonColumnMap = map:{
    #    ; REGISTER_DATETIME=TIMESTAMP ; REGISTER_USER=VARCHAR
    #    ; UPDATE_DATETIME=TIMESTAMP   ; UPDATE_USER=VARCHAR
    #}
    #; beforeInsertMap = map:{
    #    ; REGISTER_DATETIME = $$AccessContext$$.getAccessLocalDateTimeOnThread()
    #    ; REGISTER_USER     = $$AccessContext$$.getAccessUserOnThread()

			p.errorf("register list: bad low register in `[%s`", loName)
		}
		return
	}
	if tok := p.next().ScanToken; tok != '-' {
		p.errorf("register list: expected '-' after `[%s`, found %s", loName, tok)
		return
	}
	hiName := p.next().String()
	hi, ok := p.arch.Register[hiName]
	if !ok {
		p.errorf("register list: bad high register in `[%s-%s`", loName, hiName)
		return
	}

    registry.unregister(s1);

    assertThrows(IllegalArgumentException.class, () -> registry.unregister(s1));
  }

  public void testGetSubscribers() {
    assertEquals(0, Iterators.size(registry.getSubscribers("")));

    registry.register(new StringSubscriber());
    assertEquals(1, Iterators.size(registry.getSubscribers("")));

    registry.register(new StringSubscriber());

		}
	}
	return 0, false
}

// ARM64RegisterShift constructs an ARM64 register with shift operation.
func ARM64RegisterShift(reg, op, count int16) (int64, error) {
	// the base register of shift operations must be general register.
	if reg > arm64.REG_R31 || reg < arm64.REG_R0 {
		return 0, errors.New("invalid register for shift operation")
	}
	return int64(reg&31)<<16 | int64(op)<<22 | int64(uint16(count)), nil
}

          @SuppressWarnings("unused")
          @Subscribe
          public void eat(Comparable<?> food) {
            compEvents.add(food);
          }
        };
    bus.register(stringCatcher);
    bus.register(objCatcher);
    bus.register(compCatcher);

    // Two additional event types: Object and Comparable<?> (played by Integer)
    Object objEvent = new Object();
    Object compEvent = 6;

    bus.post(EVENT);

          @SuppressWarnings("unused")
          @Subscribe
          public void eat(Comparable<?> food) {
            compEvents.add(food);
          }
        };
    bus.register(stringCatcher);
    bus.register(objCatcher);
    bus.register(compCatcher);

    // Two additional event types: Object and Comparable<?> (played by Integer)
    Object objEvent = new Object();
    Object compEvent = 6;

    bus.post(EVENT);

	register["A3"] = riscv.REG_A3
	register["A4"] = riscv.REG_A4
	register["A5"] = riscv.REG_A5
	register["A6"] = riscv.REG_A6
	register["A7"] = riscv.REG_A7
	register["S2"] = riscv.REG_S2
	register["S3"] = riscv.REG_S3
	register["S4"] = riscv.REG_S4
	register["S5"] = riscv.REG_S5
	register["S6"] = riscv.REG_S6
	register["S7"] = riscv.REG_S7
	register["S8"] = riscv.REG_S8
	register["S9"] = riscv.REG_S9

  }

  // TODO(srbs): Rename ops::Add to ops::AddV2 and AddRegister to
  // AddV2Registerer.
  status_ = registry_.Register("AddV2", AddRegisterer);
  ASSERT_EQ(errors::OK, status_.code()) << status_.message();

  ASSERT_NO_FATAL_FAILURE(CompareNumericalAndAutodiffGradients(
      AddModel, BuildGradModel(AddModel, registry_),
      immediate_execution_ctx_.get(), {x.get(), y.get()}, UseFunction()));
}