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Results 1 - 10 of 10 for MOVDW (0.05 sec)
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src/cmd/asm/internal/asm/testdata/armv6.s
MOVFW.U F6, F8 // c68abcee MOVFW.U F6, R8 // c6fabcee108b1fee MOVDW F6, F8 // c68bbdee MOVDW F6, R8 // c6fbbdee108b1fee MOVDW.U F6, F8 // c68bbcee MOVDW.U F6, R8 // c6fbbcee108b1fee MOVWF F6, F8 // c68ab8ee
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Dec 21 16:30:51 UTC 2017 - 4.6K bytes - Viewed (0) -
src/cmd/internal/obj/arm/anames.go
"BIC", "MVN", "BEQ", "BNE", "BCS", "BHS", "BCC", "BLO", "BMI", "BPL", "BVS", "BVC", "BHI", "BLS", "BGE", "BLT", "BGT", "BLE", "MOVWD", "MOVWF", "MOVDW", "MOVFW", "MOVFD", "MOVDF", "MOVF", "MOVD", "CMPF", "CMPD", "ADDF", "ADDD", "SUBF", "SUBD", "MULF", "MULD", "NMULF", "NMULD", "MULAF", "MULAD", "NMULAF",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Oct 16 15:58:33 UTC 2019 - 1.4K bytes - Viewed (0) -
src/cmd/internal/obj/mips/anames.go
"CMPGED", "CMPGEF", "CMPGTD", "CMPGTF", "DIV", "DIVD", "DIVF", "DIVU", "DIVW", "GOK", "LL", "LLV", "LUI", "MADD", "MOVB", "MOVBU", "MOVD", "MOVDF", "MOVDW", "MOVF", "MOVFD", "MOVFW", "MOVH", "MOVHU", "MOVW", "MOVWD", "MOVWF", "MOVWL", "MOVWR", "MSUB", "MUL", "MULD", "MULF", "MULU", "MULW", "NEGD", "NEGF",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 1.4K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/anames.go
"PCADDU12I", "JIRL", "BGE", "BLT", "BLTU", "BGEU", "DIV", "DIVD", "DIVF", "DIVU", "DIVW", "LL", "LLV", "LUI", "MOVB", "MOVBU", "MOVD", "MOVDF", "MOVDW", "MOVF", "MOVFD", "MOVFW", "MOVH", "MOVHU", "MOVW", "MOVWD", "MOVWF", "MOVWL", "MOVWR", "MUL", "MULD", "MULF", "MULU", "MULH", "MULHU", "MULW", "NEGD",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 1.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/armerror.s
MOVWD R1, CPSR // ERROR "illegal combination" MOVWF R1, CPSR // ERROR "illegal combination" MOVDW CPSR, R2 // ERROR "illegal combination" MOVFW CPSR, R2 // ERROR "illegal combination" MOVDW R1, CPSR // ERROR "illegal combination" MOVFW R1, CPSR // ERROR "illegal combination" BFX $12, $41, R2, R3 // ERROR "wrong width or LSB"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Nov 03 14:06:21 UTC 2017 - 14.4K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/plan9x.go
{VCVT_EQ_U32_F32, []int{1, 0}, "VCVT", "MOVFW.U"}, {VCVT_EQ_F64_U32, []int{1, 0}, "VCVT", "MOVWD.U"}, {VCVT_EQ_F64_S32, []int{1, 0}, "VCVT", "MOVWD"}, {VCVT_EQ_S32_F64, []int{1, 0}, "VCVT", "MOVDW"}, {VCVT_EQ_U32_F64, []int{1, 0}, "VCVT", "MOVDW.U"}, } // convert FP instructions from GNU syntax to Plan 9 syntax, for example, // vadd.f32 s0, s3, s4 -> ADDF F0, S3, F2 // vsub.f64 d0, d2, d4 -> SUBD F0, F2, F4
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 11.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
MASKNEZ R4, R5, R6 // a6901300 MOVFD F4, F5 // 85241901 MOVDF F4, F5 // 85181901 MOVWF F4, F5 // 85101d01 MOVFW F4, F5 // 85041b01 MOVWD F4, F5 // 85201d01 MOVDW F4, F5 // 85081b01 NEGF F4, F5 // 85141401 NEGD F4, F5 // 85181401 ABSD F4, F5 // 85081401 TRUNCDW F4, F5 // 85881a01 TRUNCFW F4, F5 // 85841a01 SQRTF F4, F5 // 85441401
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 8.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARMOps.go
{name: "MOVFW", argLength: 1, reg: fpgp, asm: "MOVFW"}, // float32 -> int32 {name: "MOVDW", argLength: 1, reg: fpgp, asm: "MOVDW"}, // float64 -> int32 {name: "MOVFWU", argLength: 1, reg: fpgp, asm: "MOVFW"}, // float32 -> uint32, set U bit in the instruction {name: "MOVDWU", argLength: 1, reg: fpgp, asm: "MOVDW"}, // float64 -> uint32, set U bit in the instruction
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 41K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM.rules
// float <-> int conversion (Cvt32to32F ...) => (MOVWF ...) (Cvt32to64F ...) => (MOVWD ...) (Cvt32Uto32F ...) => (MOVWUF ...) (Cvt32Uto64F ...) => (MOVWUD ...) (Cvt32Fto32 ...) => (MOVFW ...) (Cvt64Fto32 ...) => (MOVDW ...) (Cvt32Fto32U ...) => (MOVFWU ...) (Cvt64Fto32U ...) => (MOVDWU ...) (Cvt32Fto64F ...) => (MOVFD ...) (Cvt64Fto32F ...) => (MOVDF ...) (Round(32|64)F ...) => (Copy ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 90.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, }, }, { name: "MOVDW", argLen: 1, asm: arm.AMOVDW, reg: regInfo{ inputs: []inputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, clobbers: 2147483648, // F15
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)