a += bits.RotateLeft32(x, 10)

	return a
}

func rot16(x uint16) uint16 {
	var a uint16

	// amd64:"ROLW\t[$]7"
	// riscv64: "OR","SLLI","SRLI",-"AND"
	a += x<<7 | x>>9

	// amd64:`ROLW\t[$]8`
	// riscv64: "OR","SLLI","SRLI",-"AND"
	a += x<<8 + x>>8

	// amd64:"ROLW\t[$]9"
	// riscv64: "OR","SLLI","SRLI",-"AND"
	a += x<<9 ^ x>>7

	return a
}

func rot8(x uint8) uint8 {

	"ANDN",
	"ORN",
	"XNOR",
	"CLZ",
	"CLZW",
	"CTZ",
	"CTZW",
	"CPOP",
	"CPOPW",
	"MAX",
	"MAXU",
	"MIN",
	"MINU",
	"SEXTB",
	"SEXTH",
	"ZEXTH",
	"ROL",
	"ROLW",
	"ROR",
	"RORI",
	"RORIW",
	"RORW",
	"ORCB",
	"REV8",
	"BCLR",
	"BCLRI",
	"BEXT",
	"BEXTI",
	"BINV",
	"BINVI",
	"BSET",
	"BSETI",
	"WORD",
	"BEQZ",
	"BGEZ",

}

func store_be16(b []byte, x uint16) {
	// amd64/v1,amd64/v2:`ROLW\s\$8`,-`SHR.`
	// amd64/v3:`MOVBEW`,-`ROLW`
	// arm64:`MOVH`,`REV16W`,-`MOVB`
	// ppc64le:`MOVHBR`
	// ppc64:`MOVH\s`
	// s390x:`MOVH\s.*\(.*\)$`,-`SRW\s`,-`SRD\s`
	binary.BigEndian.PutUint16(b, x)
}

func store_be16_idx(b []byte, x uint16, idx int) {
	// amd64/v1,amd64/v2:`ROLW\s\$8`,-`SHR.`

	// arm:`MOVW\tR[0-9]+@>23`
	// arm64:"RORW"
	// ppc64x:"ROTLW"
	// s390x:"RLL"
	// wasm:"I32Rotl"
	return bits.RotateLeft32(n, 9)
}

func RotateLeft16(n uint16, s int) uint16 {
	// amd64:"ROLW" 386:"ROLW"
	// arm64:"RORW",-"CSEL"
	return bits.RotateLeft16(n, s)
}

func RotateLeft8(n uint8, s int) uint8 {
	// amd64:"ROLB" 386:"ROLB"
	// arm64:"LSL","LSR",-"CSEL"
	return bits.RotateLeft8(n, s)
}

	// 1.3: Bitwise Rotation (Zbb)
	ROL	X8, X9, X10				// 33958460 or b30f8040b3dff4013395840033e5af00
	ROL	X8, X9					// b3948460 or b30f8040b3dff401b3948400b3e49f00
	ROLW	X9, X10, X11				// bb159560 or b30f9040bb5ff501bb159500b3e5bf00
	ROLW	X9, X10					// 3b159560 or b30f9040bb5ff5013b15950033e5af00
	ROR	X10, X11, X12				// 33d6a560 or b30fa040b39ff50133d6a50033e6cf00
	ROR	X10, X11				// b3d5a560 or b30fa040b39ff501b3d5a500b3e5bf00

(RotateLeft16 <t> x y) => (OR (SLL  <t> x (ANDI [15] <y.Type> y)) (SRL <t> (ZeroExt16to64 x) (ANDI [15] <y.Type> (NEG <y.Type> y))))
(RotateLeft32 ...) => (ROLW ...)
(RotateLeft64 ...) => (ROL  ...)

(Less64  ...) => (SLT  ...)
(Less32  x y) => (SLT  (SignExt32to64 x) (SignExt32to64 y))
(Less16  x y) => (SLT  (SignExt16to64 x) (SignExt16to64 y))

		{name: "ORI", argLength: 1, reg: gp11, asm: "ORI", aux: "Int64"},      // arg0 | auxint
		{name: "ROL", argLength: 2, reg: gp21, asm: "ROL"},                    // rotate left arg0 by (arg1 & 63)
		{name: "ROLW", argLength: 2, reg: gp21, asm: "ROLW"},                  // rotate left least significant word of arg0 by (arg1 & 31), sign extended
		{name: "ROR", argLength: 2, reg: gp21, asm: "ROR"},                    // rotate right arg0 by (arg1 & 63)

// rotate left negative = rotate right
(ROLQ x (NEG(Q|L) y)) => (RORQ x y)
(ROLL x (NEG(Q|L) y)) => (RORL x y)
(ROLW x (NEG(Q|L) y)) => (RORW x y)
(ROLB x (NEG(Q|L) y)) => (RORB x y)

// rotate right negative = rotate left
(RORQ x (NEG(Q|L) y)) => (ROLQ x y)
(RORL x (NEG(Q|L) y)) => (ROLL x y)
(RORW x (NEG(Q|L) y)) => (ROLW x y)
(RORB x (NEG(Q|L) y)) => (ROLB x y)

// rotate by constants

	v_1 := v.Args[1]
	v_0 := v.Args[0]
	// match: (ROLW x (MOVDconst [val]))
	// result: (RORIW [int64(int8(-val)&31)] x)
	for {
		x := v_0
		if v_1.Op != OpRISCV64MOVDconst {
			break
		}
		val := auxIntToInt64(v_1.AuxInt)
		v.reset(OpRISCV64RORIW)
		v.AuxInt = int64ToAuxInt(int64(int8(-val) & 31))
		v.AddArg(x)
		return true
	}
	// match: (ROLW x (NEG y))
	// result: (RORW x y)
	for {

	v_1 := v.Args[1]
	v_0 := v.Args[0]
	// match: (ROLW x (NEGQ y))
	// result: (RORW x y)
	for {
		x := v_0
		if v_1.Op != OpAMD64NEGQ {
			break
		}
		y := v_1.Args[0]
		v.reset(OpAMD64RORW)
		v.AddArg2(x, y)
		return true
	}
	// match: (ROLW x (NEGL y))
	// result: (RORW x y)
	for {
		x := v_0
		if v_1.Op != OpAMD64NEGL {