// Note: to minimize potentially expensive regeneration of CC opcodes during the flagalloc pass, only rewrite if
//       both ops are in the same block.
(CMPconst [0] z:((ADD|AND|ANDN|OR|SUB|NOR|XOR) x y)) && v.Block == z.Block => (CMPconst [0] convertPPC64OpToOpCC(z))
(CMPconst [0] z:((NEG|CNTLZD|RLDICL) x)) && v.Block == z.Block => (CMPconst [0] convertPPC64OpToOpCC(z))

	"EBREAK",
	"SBREAK",
	"MRET",
	"SRET",
	"DRET",
	"WFI",
	"SFENCEVMA",
	"ADDUW",
	"SH1ADD",
	"SH1ADDUW",
	"SH2ADD",
	"SH2ADDUW",
	"SH3ADD",
	"SH3ADDUW",
	"SLLIUW",
	"ANDN",
	"ORN",
	"XNOR",
	"CLZ",
	"CLZW",
	"CTZ",
	"CTZW",
	"CPOP",
	"CPOPW",
	"MAX",
	"MAXU",
	"MIN",
	"MINU",
	"SEXTB",
	"SEXTH",
	"ZEXTH",
	"ROL",
	"ROLW",

#define ROUND1(a, b, c, d, index, const, shift) \
	ADD	$const, index, R9; \
	ADD	R9, a; \
	AND     b, c, R9; \
	ANDN    b, d, R31; \
	OR	R9, R31, R9; \
	ADD	R9, a; \
	ROTLW	$shift, a; \
	ADD	b, a;

#define ROUND2(a, b, c, d, index, const, shift) \
	ADD	$const, index, R9; \
	ADD	R9, a; \
	AND	b, d, R31; \
	ANDN	d, c, R9; \
	OR	R9, R31; \
	ADD	R31, a; \
	ROTLW	$shift, a; \
	ADD	b, a;

	// arm64:"RBIT","CLZ"
	// s390x:"FLOGR"
	// ppc64x/power8:"ANDN","POPCNTD"
	// ppc64x/power9: "CNTTZD"
	// wasm:"I64Ctz"
	return bits.TrailingZeros(n)
}

func TrailingZeros64(n uint64) int {
	// amd64/v1,amd64/v2:"BSFQ","MOVL\t\\$64","CMOVQEQ"
	// amd64/v3:"TZCNTQ"
	// 386:"BSFL"
	// arm64:"RBIT","CLZ"
	// s390x:"FLOGR"
	// ppc64x/power8:"ANDN","POPCNTD"
	// ppc64x/power9: "CNTTZD"
	// wasm:"I64Ctz"

	"ADDCVCC",
	"ADDME",
	"ADDMECC",
	"ADDMEVCC",
	"ADDMEV",
	"ADDE",
	"ADDECC",
	"ADDEVCC",
	"ADDEV",
	"ADDZE",
	"ADDZECC",
	"ADDZEVCC",
	"ADDZEV",
	"ADDEX",
	"AND",
	"ANDCC",
	"ANDN",
	"ANDNCC",
	"ANDISCC",
	"BC",
	"BCL",
	"BEQ",
	"BGE",
	"BGT",
	"BLE",
	"BLT",
	"BNE",
	"BVC",
	"BVS",
	"BDNZ",
	"BDZ",
	"CMP",
	"CMPU",
	"CMPEQB",
	"CNTLZW",

	// go tool objdump doesn't include a [QL] on popcnt instructions, until CL 351889
	// native objdump doesn't include [QL] on linux.
	"popcnt": {"popcntq", "popcntl", "popcnt"},
	"bmi1": {
		"andnq", "andnl", "andn",
		"blsiq", "blsil", "blsi",
		"blsmskq", "blsmskl", "blsmsk",
		"blsrq", "blsrl", "blsr",
		"tzcntq", "tzcntl", "tzcnt",
	},
	"bmi2": {
		"sarxq", "sarxl", "sarx",
		"shlxq", "shlxl", "shlx",

	SLLIUW		$31, X17, X18			// 1b99f809
	SLLIUW		$63, X17			// 9b98f80b
	SLLIUW		$63, X17, X18			// 1b99f80b
	SLLIUW		$1, X18, X19			// 9b191908

	// 1.2: Basic Bit Manipulation (Zbb)
	ANDN	X19, X20, X21				// b37a3a41
	ANDN	X19, X20				// 337a3a41
	CLZ	X20, X21				// 931a0a60
	CLZW	X21, X22				// 1b9b0a60
	CPOP	X22, X23				// 931b2b60
	CPOPW	X23, X24				// 1b9c2b60
	CTZ	X24, X25				// 931c1c60

func TestLogicalCompareZero(x *[64]uint64) {
	// ppc64x:"ANDCC",^"AND"
	b := x[0]&3
	if b!=0 {
		x[0] = b
	}
	// ppc64x:"ANDCC",^"AND"
	b = x[1]&x[2]
	if b!=0 {
		x[1] = b
	}
	// ppc64x:"ANDNCC",^"ANDN"
	b = x[1]&^x[2]
	if b!=0 {
		x[1] = b
	}
	// ppc64x:"ORCC",^"OR"
	b = x[3]|x[4]
	if b!=0 {
		x[3] = b
	}
	// ppc64x:"SUBCC",^"SUB"
	b = x[5]-x[6]
	if b!=0 {
		x[5] = b
	}

	LBZX:      "MOVBZ",
	LBZUX:     "MOVBZU",
	LDBRX:     "MOVDBR",
	LWBRX:     "MOVWBR",
	LHBRX:     "MOVHBR",
	MCRF:      "MOVFL",
	XORI:      "XOR",
	ORI:       "OR",
	ANDICC:    "ANDCC",
	ANDC:      "ANDN",
	ANDCCC:    "ANDNCC",
	ADDEO:     "ADDEV",
	ADDEOCC:   "ADDEVCC",
	ADDO:      "ADDV",
	ADDOCC:    "ADDVCC",
	ADDMEO:    "ADDMEV",
	ADDMEOCC:  "ADDMEVCC",
	ADDCO:     "ADDCV",
	ADDCOCC:   "ADDCVCC",

(Ctz64 x) && buildcfg.GOPPC64<=8 => (POPCNTD (ANDN <typ.Int64> (ADDconst <typ.Int64> [-1] x) x))
(Ctz64 x) => (CNTTZD x)
(Ctz32 x) && buildcfg.GOPPC64<=8 => (POPCNTW (MOVWZreg (ANDN <typ.Int> (ADDconst <typ.Int> [-1] x) x)))
(Ctz32 x) => (CNTTZW (MOVWZreg x))
(Ctz16 x) => (POPCNTW (MOVHZreg (ANDN <typ.Int16> (ADDconst <typ.Int16> [-1] x) x)))
(Ctz8 x)  => (POPCNTB (MOVBZreg (ANDN <typ.UInt8> (ADDconst <typ.UInt8> [-1] x) x)))