"MULHWCC",
	"MULHWU",
	"MULHWUCC",
	"MULLW",
	"MULLWCC",
	"MULLWVCC",
	"MULLWV",
	"NAND",
	"NANDCC",
	"NEG",
	"NEGCC",
	"NEGVCC",
	"NEGV",
	"NOR",
	"NORCC",
	"OR",
	"ORCC",
	"ORN",
	"ORNCC",
	"ORIS",
	"REM",
	"REMU",
	"RFI",
	"RLWMI",
	"RLWMICC",
	"RLWNM",
	"RLWNMCC",
	"CLRLSLWI",
	"SLW",
	"SLWCC",
	"SRW",
	"SRAW",
	"SRAWCC",

	if b!=0 {
		x[0] = b
	}
	// ppc64x:"ANDCC",^"AND"
	b = x[1]&x[2]
	if b!=0 {
		x[1] = b
	}
	// ppc64x:"ANDNCC",^"ANDN"
	b = x[1]&^x[2]
	if b!=0 {
		x[1] = b
	}
	// ppc64x:"ORCC",^"OR"
	b = x[3]|x[4]
	if b!=0 {
		x[3] = b
	}
	// ppc64x:"SUBCC",^"SUB"
	b = x[5]-x[6]
	if b!=0 {
		x[5] = b
	}
	// ppc64x:"NORCC",^"NOR"
	b = ^(x[5]|x[6])
	if b!=0 {
		x[5] = b

	case FADD, FADDS, FSUB, FSUBS, FMUL, FMULS, FDIV, FDIVS, FMADD, FMADDS, FMSUB, FMSUBS, FNMADD, FNMADDS, FNMSUB, FNMSUBS, FMULSCC:
		return true
	case FADDCC, FADDSCC, FSUBCC, FMULCC, FDIVCC, FDIVSCC:
		return true
	case OR, ORCC, ORC, ORCCC, AND, ANDCC, ANDC, ANDCCC, XOR, XORCC, NAND, NANDCC, EQV, EQVCC, NOR, NORCC:
		return true
	case SLW, SLWCC, SLD, SLDCC, SRW, SRAW, SRWCC, SRAWCC, SRD, SRDCC, SRAD, SRADCC:
		return true
	}
	return false

			break
		}
		z := v_0.Args[0]
		if z.Op != OpPPC64ANDNCC {
			break
		}
		v.reset(OpSelect1)
		v.Type = t
		v.AddArg(z)
		return true
	}
	// match: (CMPconst <t> [0] (Select0 z:(ORCC x y)))
	// result: (Select1 <t> z)
	for {
		t := v.Type
		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
			break
		}
		z := v_0.Args[0]
		if z.Op != OpPPC64ORCC {
			break
		}

	if d&255 == 0 {
		return 1
	}

	// ppc64x:"ANDCC",-"CMP"
	// wasm:"I64Eqz",-"I32Eqz",-"I64ExtendI32U",-"I32WrapI64"
	if d&e == 0 {
		return 1
	}
	// ppc64x:"ORCC",-"CMP"
	// wasm:"I64Eqz",-"I32Eqz",-"I64ExtendI32U",-"I32WrapI64"
	if d|e == 0 {
		return 1
	}

	// ppc64x:"XORCC",-"CMP"
	// wasm:"I64Eqz","I32Eqz",-"I64ExtendI32U",-"I32WrapI64"
	if e^d == 0 {

(SETBC [2] (CMPconst [0] o:(OR y z))) && o.Uses == 1 => (SETBC [2] (Select1 <types.TypeFlags> (ORCC y z )))
(SETBCR [2] (CMPconst [0] o:(OR y z))) && o.Uses == 1 => (SETBCR [2] (Select1 <types.TypeFlags> (ORCC y z )))

(SETBC [2] (CMPconst [0] a:(XOR y z))) && a.Uses == 1 => (SETBC [2] (Select1 <types.TypeFlags> (XORCC y z )))

		{name: "ORN", argLength: 2, reg: gp21, asm: "ORN"},                                              // arg0|^arg1
		{name: "ORCC", argLength: 2, reg: gp21, asm: "ORCC", commutative: true, typ: "(Int,Flags)"},     // arg0|arg1 sets CC
		{name: "NOR", argLength: 2, reg: gp21, asm: "NOR", commutative: true},                           // ^(arg0|arg1)

	ANDNCC R3, R4, R5               // 7c851879
	OR R3, R4                       // 7c841b78
	OR R3, R4, R5                   // 7c851b78
	ORN R3, R4, R5                  // 7c851b38
	ORCC R3, R4, R5                 // 7c851b79
	ORNCC R3, R4, R5                // 7c851b39
	XOR R3, R4                      // 7c841a78
	XOR R3, R4, R5                  // 7c851a78
	XORCC R3, R4, R5                // 7c851a79

		v1.AddArg2(y, z)
		v0.AddArg(v1)
		v.AddArg(v0)
		return true
	}
	// match: (SETBC [2] (CMPconst [0] o:(OR y z)))
	// cond: o.Uses == 1
	// result: (SETBC [2] (Select1 <types.TypeFlags> (ORCC y z )))
	for {
		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64CMPconst || auxIntToInt64(v_0.AuxInt) != 0 {
			break
		}
		o := v_0.Args[0]
		if o.Op != OpPPC64OR {
			break
		}

	MTFSFI
	MTFSFICC
	MTMSR
	MTSPR
	MULLI
	MULLW
	MULLWCC
	MULLWO
	MULLWOCC
	NAND
	NANDCC
	NEG
	NEGCC
	NEGO
	NEGOCC
	NOR
	NORCC
	OR
	ORCC
	ORC
	ORCCC
	NOP
	ORI
	ORIS
	RLWIMI
	RLWIMICC
	RLWINM
	RLWINMCC
	RLWNM
	RLWNMCC
	SLW
	SLWCC
	SRAW
	SRAWCC
	SRAWI
	SRAWICC
	SRW