MOVWBR	0(R6), R8
	MOVWZ	R5, R9

#define ROUND1(a, b, c, d, index, const, shift) \
	XOR	c, R9; \
	ADD	$const, a; \
	ADD	R8, a; \
	MOVWBR	(index*4)(R6), R8; \
	AND	b, R9; \
	XOR	d, R9; \
	ADD	R9, a; \
	RLL	$shift, a; \
	MOVWZ	c, R9; \
	ADD	b, a

	ROUND1(R2,R3,R4,R5, 1,0xd76aa478, 7);
	ROUND1(R5,R2,R3,R4, 2,0xe8c7b756,12);
	ROUND1(R4,R5,R2,R3, 3,0x242070db,17);
	ROUND1(R3,R4,R5,R2, 4,0xc1bdceee,22);

	a += x<<7 | x>>25

	// amd64:`ROLL\t[$]8`
	// arm:"MOVW\tR\\d+@>24"
	// arm64:"RORW\t[$]24"
	// s390x:"RLL\t[$]8"
	// ppc64x:"ROTLW\t[$]8"
	// loong64: "ROTR\t[$]24"
	// riscv64: "RORIW\t[$]24"
	a += x<<8 + x>>24

	// amd64:"ROLL\t[$]9"
	// arm:"MOVW\tR\\d+@>23"
	// arm64:"RORW\t[$]23"
	// s390x:"RLL\t[$]9"
	// ppc64x:"ROTLW\t[$]9"
	// loong64: "ROTR\t[$]23"
	// riscv64: "RORIW\t[$]23"
	a += x<<9 ^ x>>23

	MOVD    $sinhe1<>+0(SB), R3
	WFCEDBS V2, V4, V2
	FMOVD   0(R3), F5
	MOVD    $sinhe0<>+0(SB), R3
	WFMADB  V6, V1, V5, V1
	FMOVD   0(R3), F5
	VLGVG   $0, V16, R2
	WFMADB  V6, V3, V5, V6
	RLL     $3, R2, R2
	RISBGN	$0, $15, $48, R2, R1
	BEQ     L9
	WFMSDB  V0, V1, V6, V0
	MOVD    $sinhx4ff<>+0(SB), R3
	FNEG    F0, F0
	FMOVD   0(R3), F2
	FMUL    F2, F0
	ANDW    $0xFFFF, R2

	FMOVD	x+0(FP), F0
	//special case Atan(±0) = ±0
	FMOVD   $(0.0), F1
	FCMPU   F0, F1
	BEQ     atanIsZero

	MOVD	$·atanrodataL8<>+0(SB), R5
	MOVH	$0x3FE0, R3
	LGDR	F0, R1
	RISBGNZ	$32, $63, $32, R1, R1
	RLL	$16, R1, R2
	ANDW	$0x7FF0, R2
	MOVW	R2, R6
	MOVW	R3, R7
	CMPUBLE	R6, R7, L6
	MOVD	$·atanxmone<>+0(SB), R3
	FMOVD	0(R3), F2
	WFDDB	V0, V2, V0
	RISBGZ	$63, $63, $33, R1, R1
	MOVD	$·atanxpi2h<>+0(SB), R3

	"MOVDLT",
	"MOVDNE",
	"LOCR",
	"LOCGR",
	"FLOGR",
	"POPCNT",
	"AND",
	"ANDW",
	"OR",
	"ORW",
	"XOR",
	"XORW",
	"SLW",
	"SLD",
	"SRW",
	"SRAW",
	"SRD",
	"SRAD",
	"RLL",
	"RLLG",
	"RNSBG",
	"RXSBG",
	"ROSBG",
	"RNSBGT",
	"RXSBGT",
	"ROSBGT",
	"RISBG",
	"RISBGN",
	"RISBGZ",
	"RISBGNZ",
	"RISBHG",
	"RISBLG",
	"RISBHGZ",
	"RISBLGZ",
	"FABS",

	SRAD	$4, R5, R8              // eb850004000a
	SRAD	R3, R5, R8              // eb853000000a
	SRAW	$4, R5, R8              // eb85000400dc
	SRAW	R3, R5, R8              // eb85300000dc
	RLL	R1, R2, R3              // eb321000001d
	RLL	$4, R2, R3              // eb320004001d
	RLLG	R1, R2, R3              // eb321000001c
	RLLG	$4, R2, R3              // eb320004001c

	RNSBG	$0, $31, $32, R1, R2  // ec21001f2054

	// wasm:"I64Rotl"
	return bits.RotateLeft64(n, 37)
}

func RotateLeft32(n uint32) uint32 {
	// amd64:"ROLL" 386:"ROLL"
	// arm:`MOVW\tR[0-9]+@>23`
	// arm64:"RORW"
	// ppc64x:"ROTLW"
	// s390x:"RLL"
	// wasm:"I32Rotl"
	return bits.RotateLeft32(n, 9)
}

func RotateLeft16(n uint16, s int) uint16 {
	// amd64:"ROLW" 386:"ROLW"
	// arm64:"RORW",-"CSEL"
	return bits.RotateLeft16(n, s)
}

	MOVD	$·powtexp<>+0(SB), R3
	WORD	$0x68343000	//ld	%f3,0(%r4,%r3)
	FMADD	F3, F4, F4
	RISBGN	$0, $15, $48, R2, R5
	WFMADB	V4, V1, V3, V4
	LGDR	F6, R2
	LDGR	R5, F1
	SRAD	$48, R2, R2
	FMADD	F1, F4, F1
	RLL	$16, R2, R2
	ANDW	$0x7FFF0000, R2
	WORD	$0xC22B3F71	//alfi	%r2,1064370176
	BYTE	$0x00
	BYTE	$0x00
	ORW	R2, R1, R3
	MOVW	R3, R6
	CMPBLT	R6, $0, L43
L1:
	FMOVD	F1, ret+16(FP)
	RET
L43:

	ORW	$~0xff, R4           // R4 = uint32(v) | 0xffffff00
	MOVD	$(3<<3), R5
	RXSBG	$59, $60, $3, R3, R5 // R5 = 24 - ((addr % 4) * 8) = ((addr & 3) << 3) ^ (3 << 3)
	ANDW	$~3, R3              // R3 = floor(addr, 4) = addr &^ 3
	RLL	R5, R4, R4           // R4 = rotl(R4, R5)
	LAN	R4, R6, 0(R3)        // R6 = *R3; *R3 &= R4; (atomic)
	RET

// func Or(addr *uint32, v uint32)
TEXT ·Or(SB), NOSPLIT, $0-12
	MOVD	ptr+0(FP), R3
	MOVW	val+8(FP), R4

		{name: "RLLG", argLength: 2, reg: sh21, asm: "RLLG"},                  // arg0 rotate left arg1, rotate amount 0-63
		{name: "RLL", argLength: 2, reg: sh21, asm: "RLL"},                    // arg0 rotate left arg1, rotate amount 0-31
		{name: "RLLconst", argLength: 1, reg: gp11, asm: "RLL", aux: "UInt8"}, // arg0 rotate left auxint, rotate amount 0-31

		// Rotate then (and|or|xor|insert) selected bits instructions.
		//