#include "textflag.h"

// func archCeil(x float64) float64
TEXT ·archCeil(SB),NOSPLIT,$0
	FMOVD   x+0(FP), F0  // F0=x
	FSTCW   -2(SP)       // save old Control Word
	MOVW    -2(SP), AX
	ANDW    $0xf3ff, AX
	ORW     $0x0800, AX  // Rounding Control set to +Inf
	MOVW    AX, -4(SP)   // store new Control Word
	FLDCW   -4(SP)       // load new Control Word
	FRNDINT              // F0=Ceil(x)

	AND	$-65536, R1           // c01bffff0000
	AND	$1, R1                // c0a100000001b980001a
	ANDW	R1, R2                // 1421
	ANDW	R1, R2, R3            // b9f42031
	ANDW	$1, R1                // c01b00000001
	ANDW	$131071, R1           // a5160001
	ANDW	$65536, R1            // c01b00010000
	ANDW	$-2, R1               // a517fffe
	OR	R1, R2                // b9810021
	OR	R1, R2, R3            // b9e62031

	MOVW	R6, R14
	MOVW	R7, R15

	MOVW	(0*4)(R1), R8
	MOVW	R7, R9

#define ROUND1(a, b, c, d, index, const, shift) \
	ADDW	$const, a; \
	ADDW	R8, a; \
	MOVW	(index*4)(R1), R8; \
	EORW	c, R9; \
	ANDW	b, R9; \
	EORW	d, R9; \
	ADDW	R9, a; \
	RORW	$(32-shift), a; \
	MOVW	c, R9; \
	ADDW	b, a

	ROUND1(R4,R5,R6,R7, 1,0xd76aa478, 7);
	ROUND1(R7,R4,R5,R6, 2,0xe8c7b756,12);
	ROUND1(R6,R7,R4,R5, 3,0x242070db,17);

	MOVH	$0x8405, R0
	BR	L15
L7:
	LTDBR	F0, F0
	BLEU	L3
L15:
	FMUL	F2, F0
	LGDR	F0, R1
	SRAD	$48, R1, R1
	SUBW	R1, R0, R2
	SUBW	R1, R12, R3
	BYTE	$0x18	//lr	%r4,%r2
	BYTE	$0x42
	ANDW	$0xFFFFFFF0, R3
	ANDW	$0xFFFFFFF0, R2
	BYTE	$0x18	//lr	%r5,%r1
	BYTE	$0x51
	MOVW	R1, R7
	CMPBLE	R7, $22, L7
	RISBGN	$0, $15, $48, R3, R6
	RISBGN	$16, $31, $32, R2, R8
L2:
	MOVH	R5, R5
	MOVH	$0x7FEF, R1

	FUCOMI  F0, F1       // compare F0 to F1
	JCC     2(PC)        // jump if F0 >= F1
	FXCHD   F0, F1       // F0=|p| (larger), F1=|q| (smaller)
	FTST                 // compare F0 to 0
	FSTSW	AX
	ANDW    $0x4000, AX
	JNE     10(PC)       // jump if F0 = 0
	FXCHD   F0, F1       // F0=q (smaller), F1=p (larger)
	FDIVD   F1, F0       // F0=q(=q/p), F1=p
	FMULD   F0, F0       // F0=q*q, F1=p

	obj.A_ARCHSPECIFIC: "ADC",
	"ADCS",
	"ADCSW",
	"ADCW",
	"ADD",
	"ADDS",
	"ADDSW",
	"ADDW",
	"ADR",
	"ADRP",
	"AESD",
	"AESE",
	"AESIMC",
	"AESMC",
	"AND",
	"ANDS",
	"ANDSW",
	"ANDW",
	"ASR",
	"ASRW",
	"AT",
	"BCC",
	"BCS",
	"BEQ",
	"BFI",
	"BFIW",
	"BFM",
	"BFMW",
	"BFXIL",
	"BFXILW",
	"BGE",
	"BGT",
	"BHI",
	"BHS",
	"BIC",
	"BICS",
	"BICSW",

	WFMADB  V6, V3, V5, V6
	RLL     $3, R2, R2
	RISBGN	$0, $15, $48, R2, R1
	BEQ     L9
	WFMSDB  V0, V1, V6, V0
	MOVD    $sinhx4ff<>+0(SB), R3
	FNEG    F0, F0
	FMOVD   0(R3), F2
	FMUL    F2, F0
	ANDW    $0xFFFF, R2
	WORD    $0xA53FEFB6     //llill %r3,61366
	SUBW    R2, R3, R2
	RISBGN	$0, $15, $48, R2, R1
	LDGR    R1, F2
	FMUL    F2, F0
	FMOVD   F0, ret+8(FP)
	RET

L20:

	// containing v to OR with the entire word atomically.
	MOVD	$(3<<3), R5
	RXSBG	$59, $60, $3, R3, R5 // R5 = 24 - ((addr % 4) * 8) = ((addr & 3) << 3) ^ (3 << 3)
	ANDW	$~3, R3              // R3 = floor(addr, 4) = addr &^ 3
	SLW	R5, R4               // R4 = uint32(v) << R5
	LAO	R4, R6, 0(R3)        // R6 = *R3; *R3 |= R4; (atomic)
	RET

// func And8(addr *uint8, v uint8)

	MRS	DCZID_EL0, R3
	TBZ	$4, R3, init
	// ZVA not available
	MOVW	$~0, R5
	MOVW	R5, block_size<>(SB)
	B	no_zva

init:
	MOVW	$4, R9
	ANDW	$15, R3, R5
	LSLW	R5, R9, R5
	MOVW	R5, block_size<>(SB)

	ANDS	$63, R5, R9
	// Block size is less than 64.
	BNE	no_zva

zero_by_line:
	CMP	R5, R1
	// Not enough memory to reach alignment

	//special case Atan(±0) = ±0
	FMOVD   $(0.0), F1
	FCMPU   F0, F1
	BEQ     atanIsZero

	MOVD	$·atanrodataL8<>+0(SB), R5
	MOVH	$0x3FE0, R3
	LGDR	F0, R1
	RISBGNZ	$32, $63, $32, R1, R1
	RLL	$16, R1, R2
	ANDW	$0x7FF0, R2
	MOVW	R2, R6
	MOVW	R3, R7
	CMPUBLE	R6, R7, L6
	MOVD	$·atanxmone<>+0(SB), R3
	FMOVD	0(R3), F2
	WFDDB	V0, V2, V0
	RISBGZ	$63, $63, $33, R1, R1
	MOVD	$·atanxpi2h<>+0(SB), R3
	MOVWZ	R1, R1