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Results 11 - 20 of 32 for SGTU (0.05 sec)

  1. src/runtime/memclr_loong64.s

    	ADDV	R4, R5, R6
    
    	// if less than 8 bytes, do one byte at a time
    	SGTU	$8, R5, R8
    	BNE	R8, out
    
    	// do one byte at a time until 8-aligned
    	AND	$7, R4, R8
    	BEQ	R8, words
    	MOVB	R0, (R4)
    	ADDV	$1, R4
    	JMP	-4(PC)
    
    words:
    	// do 8 bytes at a time if there is room
    	ADDV	$-7, R6, R5
    
    	PCALIGN	$16
    	SGTU	R5, R4, R8
    	BEQ	R8, out
    	MOVV	R0, (R4)
    	ADDV	$8, R4
    	JMP	-4(PC)
    
    out:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 766 bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/loong64enc3.s

    	SGT	$74565, R4, R5 			// 5e020014de178d0385781200
    	SGT	$4097, R4 			// 3e000014de07800384781200
    	SGT	$4097, R4, R5 			// 3e000014de07800385781200
    	SGTU	$74565, R4 			// 5e020014de178d0384f81200
    	SGTU	$74565, R4, R5 			// 5e020014de178d0385f81200
    	SGTU	$4097, R4 			// 3e000014de07800384f81200
    	SGTU	$4097, R4, R5 			// 3e000014de07800385f81200
    	ADDU	$74565, R4 			// 5e020014de178d0384781000
    	ADDU	$74565, R4, R5 			// 5e020014de178d0385781000
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 14 23:57:43 UTC 2022
    - 6.3K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/MIPS.rules

    (EqPtr x y) => (SGTUconst [1] (XOR x y))
    (Eq(32|64)F x y) => (FPFlagTrue (CMPEQ(F|D) x y))
    
    (Neq8 x y)  => (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
    (Neq16 x y) => (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
    (Neq32 x y) => (SGTU (XOR x y) (MOVWconst [0]))
    (NeqPtr x y) => (SGTU (XOR x y) (MOVWconst [0]))
    (Neq(32|64)F x y) => (FPFlagFalse (CMPEQ(F|D) x y))
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 35.3K bytes
    - Viewed (0)
  4. src/internal/bytealg/equal_mips64x.s

    // memequal(a, b unsafe.Pointer, size uintptr) bool
    TEXT runtime·memequal(SB),NOSPLIT|NOFRAME,$0-25
    	MOVV	a+0(FP), R1
    	MOVV	b+8(FP), R2
    	BEQ	R1, R2, eq
    	MOVV	size+16(FP), R3
    	ADDV	R1, R3, R4
    
    	// chunk size is 16
    	SGTU	$16, R3, R8
    	BEQ	R0, R8, chunk_entry
    
    byte_loop:
    	BNE	R1, R4, byte_test
    	MOVV	$1, R1
    	MOVB	R1, ret+24(FP)
    	RET
    byte_test:
    	MOVBU	(R1), R6
    	ADDV	$1, R1
    	MOVBU	(R2), R7
    	ADDV	$1, R2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 2K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/rewriteLOONG64.go

    	// match: (IsInBounds idx len)
    	// result: (SGTU len idx)
    	for {
    		idx := v_0
    		len := v_1
    		v.reset(OpLOONG64SGTU)
    		v.AddArg2(len, idx)
    		return true
    	}
    }
    func rewriteValueLOONG64_OpIsNonNil(v *Value) bool {
    	v_0 := v.Args[0]
    	b := v.Block
    	typ := &b.Func.Config.Types
    	// match: (IsNonNil ptr)
    	// result: (SGTU ptr (MOVVconst [0]))
    	for {
    		ptr := v_0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:26:25 UTC 2023
    - 195.8K bytes
    - Viewed (0)
  6. src/runtime/memmove_mipsx.s

    	ADDU	R3, R2, R4	// end pointer for source
    	ADDU	R3, R1, R5	// end pointer for destination
    
    	// if destination is ahead of source, start at the end of the buffer and go backward.
    	SGTU	R1, R2, R6
    	BNE	R6, backward
    
    	// if less than 4 bytes, use byte by byte copying
    	SGTU	$4, R3, R6
    	BNE	R6, f_small_copy
    
    	// align destination to 4 bytes
    	AND	$3, R1, R6
    	BEQ	R6, f_dest_aligned
    	SUBU	R1, R0, R6
    	AND	$3, R6
    	MOVWHI	0(R2), R7
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 4.4K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/rewriteMIPS64.go

    	// match: (IsInBounds idx len)
    	// result: (SGTU len idx)
    	for {
    		idx := v_0
    		len := v_1
    		v.reset(OpMIPS64SGTU)
    		v.AddArg2(len, idx)
    		return true
    	}
    }
    func rewriteValueMIPS64_OpIsNonNil(v *Value) bool {
    	v_0 := v.Args[0]
    	b := v.Block
    	typ := &b.Func.Config.Types
    	// match: (IsNonNil ptr)
    	// result: (SGTU ptr (MOVVconst [0]))
    	for {
    		ptr := v_0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 03:59:48 UTC 2023
    - 211.6K bytes
    - Viewed (0)
  8. src/cmd/internal/obj/mips/anames.go

    	"MULU",
    	"MULW",
    	"NEGD",
    	"NEGF",
    	"NEGW",
    	"NEGV",
    	"NOOP",
    	"NOR",
    	"OR",
    	"REM",
    	"REMU",
    	"RFE",
    	"ROTR",
    	"ROTRV",
    	"SC",
    	"SCV",
    	"SEB",
    	"SEH",
    	"SGT",
    	"SGTU",
    	"SLL",
    	"SQRTD",
    	"SQRTF",
    	"SRA",
    	"SRL",
    	"SUB",
    	"SUBD",
    	"SUBF",
    	"SUBU",
    	"SUBW",
    	"SYNC",
    	"SYSCALL",
    	"TEQ",
    	"TLBP",
    	"TLBR",
    	"TLBWI",
    	"TLBWR",
    	"TNE",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 1.4K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/loong64/anames.go

    	"MULD",
    	"MULF",
    	"MULU",
    	"MULH",
    	"MULHU",
    	"MULW",
    	"NEGD",
    	"NEGF",
    	"NEGW",
    	"NEGV",
    	"NOOP",
    	"NOR",
    	"OR",
    	"REM",
    	"REMU",
    	"RFE",
    	"SC",
    	"SCV",
    	"SGT",
    	"SGTU",
    	"SLL",
    	"SQRTD",
    	"SQRTF",
    	"SRA",
    	"SRL",
    	"ROTR",
    	"SUB",
    	"SUBD",
    	"SUBF",
    	"SUBU",
    	"SUBW",
    	"DBAR",
    	"SYSCALL",
    	"TEQ",
    	"TNE",
    	"WORD",
    	"XOR",
    	"MASKEQZ",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  10. src/runtime/memclr_mipsx.s

    // func memclrNoHeapPointers(ptr unsafe.Pointer, n uintptr)
    TEXT runtime·memclrNoHeapPointers(SB),NOSPLIT,$0-8
    	MOVW	n+4(FP), R2
    	MOVW	ptr+0(FP), R1
    
    	SGTU	$4, R2, R3
    	ADDU	R2, R1, R4
    	BNE	R3, small_zero
    
    ptr_align:
    	AND	$3, R1, R3
    	BEQ	R3, setup
    	SUBU	R1, R0, R3
    	AND	$3, R3		// R3 contains number of bytes needed to align ptr
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 06 10:24:44 UTC 2021
    - 1.3K bytes
    - Viewed (0)
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