- Sort Score
- Result 10 results
- Languages All
Results 11 - 20 of 30 for SUBW (0.07 sec)
-
src/cmd/internal/obj/arm64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 18 01:40:37 UTC 2023 - 5.4K bytes - Viewed (0) -
src/math/sinh_s390x.s
BEQ L9 WFMSDB V0, V1, V6, V0 MOVD $sinhx4ff<>+0(SB), R3 FNEG F0, F0 FMOVD 0(R3), F2 FMUL F2, F0 ANDW $0xFFFF, R2 WORD $0xA53FEFB6 //llill %r3,61366 SUBW R2, R3, R2 RISBGN $0, $15, $48, R2, R1 LDGR R1, F2 FMUL F2, F0 FMOVD F0, ret+8(FP) RET L20: MOVD $sinhxadd<>+0(SB), R2 FMOVD 0(R2), F2 MOVD sinhrlog2<>+0(SB), R2
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 17 13:54:10 UTC 2021 - 6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64.s
SLLW X5, X6, X7 // bb135300 SRLW X5, X6, X7 // bb535300 SUBW X5, X6, X7 // bb035340 SRAW X5, X6, X7 // bb535340 ADDIW $1, X6 // 1b031300 SLLIW $1, X6 // 1b131300 SRLIW $1, X6 // 1b531300 SRAIW $1, X6 // 1b531340 ADDW X5, X7 // bb835300 SLLW X5, X7 // bb935300 SRLW X5, X7 // bbd35300 SUBW X5, X7 // bb835340 SRAW X5, X7 // bbd35340
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 22 04:42:21 UTC 2024 - 16.7K bytes - Viewed (0) -
src/math/atanh_s390x.s
BYTE $0x00 BYTE $0x1A LGDR F4, R4 SRAD $32, R4 FMOVD F4, F3 WORD $0xED305088 //sdb %f3,.L12-.L10(%r5) BYTE $0x00 BYTE $0x1B SUBW R4, R2 WFSDB V3, V2, V3 RISBGZ $32, $47, $0, R2, R1 SLD $32, R1, R1 LDGR R1, F2 WFMADB V4, V2, V16, V4 SRAW $8, R2, R1 WFMADB V4, V5, V6, V5 WFMDB V4, V4, V6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 23 20:52:57 UTC 2023 - 5.1K bytes - Viewed (0) -
src/math/pow_s390x.s
LGDR F0, R3 WORD $0xC0298009 //iilf %r2,2148095317 BYTE $0x55 BYTE $0x55 RISBGNZ $32, $63, $32, R3, R1 SUBW R1, R2 RISBGNZ $58, $63, $50, R2, R3 BYTE $0x18 //lr %r5,%r1 BYTE $0x51 MOVD $·powtabi<>+0(SB), R12 WORD $0xE303C000 //llgc %r0,0(%r3,%r12) BYTE $0x00 BYTE $0x90 SUBW $0x1A0000, R5 SLD $3, R0, R3 MOVD $·powtm<>+0(SB), R4 MOVH $0x0, R8 ANDW $0x7FF00000, R2 ORW R5, R1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 16.3K bytes - Viewed (0) -
src/cmd/internal/obj/s390x/anames.go
"ADDW", "DIVW", "DIVWU", "DIVD", "DIVDU", "MODW", "MODWU", "MODD", "MODDU", "MULLW", "MULLD", "MULHD", "MULHDU", "MLGR", "SUB", "SUBC", "SUBV", "SUBE", "SUBW", "NEG", "NEGW", "MOVWBR", "MOVB", "MOVBZ", "MOVH", "MOVHBR", "MOVHZ", "MOVW", "MOVWZ", "MOVD", "MOVDBR", "MOVDEQ", "MOVDGE", "MOVDGT", "MOVDLE", "MOVDLT",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Sep 05 16:41:03 UTC 2023 - 7.1K bytes - Viewed (0) -
src/math/log1p_s390x.s
WFSDB V0, V3, V4 VLEG $0, 0(R1), V18 MOVD $·log1pc5<>+0(SB), R1 VLEG $0, 0(R1), V16 MOVD R2, R5 LGDR F4, R3 WORD $0xC0190006 //iilf %r1,425983 BYTE $0x7F BYTE $0xFF SRAD $32, R3, R3 SUBW R3, R1 SRW $16, R1, R1 BYTE $0x18 //lr %r4,%r1 BYTE $0x41 RISBGN $0, $15, $48, R4, R2 RISBGN $16, $31, $32, R4, R5 MOVW R0, R6 MOVW R3, R7 CMPBGT R6, R7, L8 WFCEDBS V4, V4, V6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 15:34:41 UTC 2019 - 5.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
(ADDW x (MOVDconst [c])) => (ADDWconst [int32(c)] x) (SUB x (MOVDconst [c])) && is32Bit(c) => (SUBconst x [int32(c)]) (SUB (MOVDconst [c]) x) && is32Bit(c) => (NEG (SUBconst <v.Type> x [int32(c)])) (SUBW x (MOVDconst [c])) => (SUBWconst x [int32(c)]) (SUBW (MOVDconst [c]) x) => (NEGW (SUBWconst <v.Type> x [int32(c)])) (MULLD x (MOVDconst [c])) && is32Bit(c) => (MULLDconst [int32(c)] x) (MULLW x (MOVDconst [c])) => (MULLWconst [int32(c)] x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64.rules
(SUB <t> (MOVDconst [val]) y) && is32Bit(-val) => (NEG (ADDI <t> [-val] y)) // Subtraction of zero. (SUB x (MOVDconst [0])) => x (SUBW x (MOVDconst [0])) => (ADDIW [0] x) // Subtraction from zero. (SUB (MOVDconst [0]) x) => (NEG x) (SUBW (MOVDconst [0]) x) => (NEGW x) // Fold negation into subtraction. (NEG (SUB x y)) => (SUB y x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 40.3K bytes - Viewed (0)