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Results 1 - 9 of 9 for MULHD (0.05 sec)

  1. src/cmd/internal/obj/ppc64/anames.go

    	"FCFID",
    	"FCFIDCC",
    	"FCFIDU",
    	"FCFIDUCC",
    	"FCFIDS",
    	"FCFIDSCC",
    	"FCTID",
    	"FCTIDCC",
    	"FCTIDZ",
    	"FCTIDZCC",
    	"LDAR",
    	"MOVD",
    	"MOVDU",
    	"MOVWZ",
    	"MOVWZU",
    	"MULHD",
    	"MULHDCC",
    	"MULHDU",
    	"MULHDUCC",
    	"MULLD",
    	"MULLDCC",
    	"MULLDVCC",
    	"MULLDV",
    	"RFID",
    	"RLDMI",
    	"RLDMICC",
    	"RLDIMI",
    	"RLDIMICC",
    	"RLDC",
    	"RLDCCC",
    	"RLDCR",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/s390x/anames.go

    var Anames = []string{
    	obj.A_ARCHSPECIFIC: "ADD",
    	"ADDC",
    	"ADDE",
    	"ADDW",
    	"DIVW",
    	"DIVWU",
    	"DIVD",
    	"DIVDU",
    	"MODW",
    	"MODWU",
    	"MODD",
    	"MODDU",
    	"MULLW",
    	"MULLD",
    	"MULHD",
    	"MULHDU",
    	"MLGR",
    	"SUB",
    	"SUBC",
    	"SUBV",
    	"SUBE",
    	"SUBW",
    	"NEG",
    	"NEGW",
    	"MOVWBR",
    	"MOVB",
    	"MOVBZ",
    	"MOVH",
    	"MOVHBR",
    	"MOVHZ",
    	"MOVW",
    	"MOVWZ",
    	"MOVD",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Sep 05 16:41:03 UTC 2023
    - 7.1K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/s390x.s

    	MULLW   $-32769, R8, R9       // 1898c291ffff7fff
    	MULLD	$-2147483648, R1      // c21080000000
    	MULLD   $-2147483648, R1, R2  // b9040021c22080000000
    	MULHD	R9, R8                // b90400b8b98600a9ebb9003f000ab98000b8b90900abebb8003f000ab98000b9b9e9b08a
    	MULHD	R7, R2, R1            // b90400b2b98600a7ebb7003f000ab98000b2b90900abebb2003f000ab98000b7b9e9b01a
    	MULHDU	R3, R4                // b90400b4b98600a3b904004a
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Nov 22 03:55:32 UTC 2023
    - 21.6K bytes
    - Viewed (0)
  4. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go

    }
    
    func reverseOperandOrder(op Op) bool {
    	switch op {
    	// Special case for SUBF, SUBFC: not reversed
    	case ADD, ADDC, ADDE, ADDCC, ADDCCC:
    		return true
    	case MULLW, MULLWCC, MULHW, MULHWCC, MULLD, MULLDCC, MULHD, MULHDCC, MULLWO, MULLWOCC, MULHWU, MULHWUCC, MULLDO, MULLDOCC:
    		return true
    	case DIVD, DIVDCC, DIVDU, DIVDUCC, DIVDE, DIVDECC, DIVDEU, DIVDEUCC, DIVDO, DIVDOCC, DIVDUO, DIVDUOCC:
    		return true
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 10.9K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "MADDLD", argLength: 3, reg: gp31, asm: "MADDLD", typ: "Int64"},                  // (arg0*arg1)+arg2 (signed 64-bit)
    
    		{name: "MULHD", argLength: 2, reg: gp21, asm: "MULHD", commutative: true},   // (arg0 * arg1) >> 64, signed
    		{name: "MULHW", argLength: 2, reg: gp21, asm: "MULHW", commutative: true},   // (arg0 * arg1) >> 32, signed
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/_gen/S390XOps.go

    		{name: "MULLWload", argLength: 3, reg: gpopload, asm: "MULLW", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, symEffect: "Read"}, // arg0 * *arg1. arg2=mem
    
    		{name: "MULHD", argLength: 2, reg: gp21tmp, asm: "MULHD", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true},   // (arg0 * arg1) >> width
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 52.5K bytes
    - Viewed (0)
  7. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go

    	LDX:            "ldx",
    	LWA:            "lwa",
    	LWARX:          "lwarx",
    	LWAUX:          "lwaux",
    	LWAX:           "lwax",
    	MFTB:           "mftb",
    	MTMSRD:         "mtmsrd",
    	MULHD:          "mulhd",
    	MULHDCC:        "mulhd.",
    	MULHDU:         "mulhdu",
    	MULHDUCC:       "mulhdu.",
    	MULHW:          "mulhw",
    	MULHWCC:        "mulhw.",
    	MULHWU:         "mulhwu",
    	MULHWUCC:       "mulhwu.",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 334.7K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/ppc64.s

    	MULLD R4, R4, R5                // 7ca421d2
    	MULLD $20, R4                   // 1c840014
    	MULLD $200000000, R4            // 641f0beb63ffc2007c9f21d2
    
    	MULLDCC R3, R4, R5              // 7ca419d3
    	MULHD R3, R4, R5                // 7ca41892
    	MULHDCC R3, R4, R5              // 7ca41893
    	MULHDU R3, R4, R5               // 7ca41812
    	MULHDUCC R3, R4, R5             // 7ca41813
    
    	MULLWV R3, R4                   // 7c841dd6
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 21:53:50 UTC 2024
    - 50.2K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 1073733624}, // R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
    			},
    		},
    	},
    	{
    		name:        "MULHD",
    		argLen:      2,
    		commutative: true,
    		asm:         ppc64.AMULHD,
    		reg: regInfo{
    			inputs: []inputInfo{
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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