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Results 1 - 10 of 12 for R12 (0.01 sec)
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src/cmd/asm/internal/asm/testdata/amd64.s
JMP foo+4(SB) JCS 2(PC) JMP bar<>+4(SB) JCS 2(PC) JMP bar<>+4(SB)(R11*4) JCS 2(PC) JMP *4(SP) // JMP 4(SP) JCS 2(PC) JMP *(R12) // JMP (R12) JCS 2(PC) // JMP *(R12*4) // TODO: This line is silently dropped on the floor! JCS 2(PC) JMP *(R12)(R13*4) // JMP (R12)(R13*4) JCS 2(PC) JMP *(AX) // JMP (AX) JCS 2(PC) JMP *(SP) // JMP (SP) JCS 2(PC)
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Apr 09 18:57:21 UTC 2019 - 3.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
// LMOVH rreg ',' addr // { // outcode(int($1), &$2, 0, &$4); // } MOVH R13, (R7) // a4ed0000 MOVH R10, 61(R23) // a6ea003d MOVH R8, -33(R12) // a588ffdf MOVHU R13, (R7) // a4ed0000 MOVHU R10, 61(R23) // a6ea003d MOVHU R8, -33(R12) // a588ffdf // LMOVB rreg ',' addr // { // outcode(int($1), &$2, 0, &$4); // } MOVB R1, foo<>+3(SB) MOVB R5, -18(R4) // a085ffee
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 12.4K bytes - Viewed (0) -
src/cmd/asm/internal/lex/lex_test.go
"\tMOVBLZX (off*4)(R12), reg \\", "\tADDB reg, DX", "", "LOAD(8, AX)", ), "\n.\n.MOVBLZX.(.8.*.4.).(.R12.).,.AX.\n.ADDB.AX.,.DX.\n", }, { "nested multiline macro", lines( "#define KEYROUND(xmm, load, off, r1, r2, index) \\", "\tMOVBLZX (BP)(DX*4), R8 \\", "\tload((off+1), r2) \\", "\tMOVB R8, (off*4)(R12) \\", "\tPINSRW $index, (BP)(R8*4), xmm",
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Aug 29 07:48:38 UTC 2023 - 5.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
AMORW R14, (R13), R12 // ac396338 AMORV R14, (R13), R12 // acb96338 AMXORW R14, (R13), R12 // ac396438 AMXORV R14, (R13), R12 // acb96438 AMMAXW R14, (R13), R12 // ac396538 AMMAXV R14, (R13), R12 // acb96538 AMMINW R14, (R13), R12 // ac396638 AMMINV R14, (R13), R12 // acb96638 AMMAXWU R14, (R13), R12 // ac396738 AMMAXVU R14, (R13), R12 // acb96738 AMMINWU R14, (R13), R12 // ac396838
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Sat Nov 02 01:36:19 UTC 2024 - 11.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/operand_test.go
{"AL", "AL"}, {"AX", "AX"}, {"BP", "BP"}, {"BX", "BX"}, {"CX", "CX"}, {"DI", "DI"}, {"DX", "DX"}, {"R10", "R10"}, {"R10", "R10"}, {"R11", "R11"}, {"R12", "R12"}, {"R13", "R13"}, {"R14", "R14"}, {"R15", "R15"}, {"R8", "R8"}, {"R9", "R9"}, {"g", "R14"}, {"SI", "SI"}, {"SP", "SP"}, {"X0", "X0"}, {"X1", "X1"}, {"X10", "X10"},
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Aug 29 18:31:05 UTC 2023 - 23.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Jul 24 18:45:14 UTC 2024 - 95.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/armv6.s
SQRTF F0, F1 // c01ab1ee SQRTD F4, F5 // c45bb1ee MOVFD F0, F1 // c01ab7ee MOVDF F4, F5 // c45bb7ee LDREX (R8), R9 // 9f9f98e1 LDREXB (R11), R12 // 9fcfdbe1 LDREXD (R11), R12 // 9fcfbbe1 STREX R3, (R4), R5 // STREX (R4), R3, R5 // 935f84e1 STREXB R8, (R9), g // STREXB (R9), R8, g // 98afc9e1 STREXD R8, (R9), g // STREXD (R9), R8, g // 98afa9e1
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Oct 23 15:18:14 UTC 2024 - 4.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
LAAG R4, R5, -524288(R6) // eb54600080e8 LAAL R7, R8, 8192(R9) // eb87900002fa LAALG R10, R11, -8192(R12) // ebbac000feea LAN R1, R2, (R3) // eb21300000f4 LANG R4, R5, (R6) // eb54600000e4 LAX R7, R8, (R9) // eb87900000f7 LAXG R10, R11, (R12) // ebbac00000e7 LAO R1, R2, (R3) // eb21300000f6 LAOG R4, R5, (R6) // eb54600000e6
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Sep 18 15:49:24 UTC 2024 - 22.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc_extra.s
VPGATHERQQ X0, 16(SP)(X1*1), X2 // c4e2f991540c10 VPGATHERQQ X0, 512(SP)(X1*1), X2 // c4e2f991940c00020000 VPGATHERQQ X0, (R12)(X1*1), X2 // c4c2f991140c VPGATHERQQ X0, 16(R12)(X1*1), X2 // c4c2f991540c10 VPGATHERQQ X0, 512(R12)(X1*1), X2 // c4c2f991940c00020000 VPGATHERQQ X0, (BP)(X1*1), X2 // c4e2f991540d00 VPGATHERQQ X0, 16(BP)(X1*1), X2 // c4e2f991540d10
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 57.6K bytes - Viewed (0)