//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
	SUB	R14, R13	// 01ae6822
	SUBU	R14, R13	// 01ae6823
	SUBV	R4, R3		// 0064182e
	SUBVU	R4, R3		// 0064182f
//	LSUBW imm ',' rreg
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
	SUB	$6512, R13	// 21ade690
	SUB	$-6512, R13	// 21ad1970
	SUBU	$6512, R13	// 25ade690
	SUBV	$9531, R16	// 6210dac5
	SUBV	$-9531, R13	// 61ad253b
	SUBVU	$9531, R16	// 6610dac5

	//TODO LDTR -0x1e(R3), R4                  // 64285eb8
	//TODO LDTR -0xe5(R3), R10                 // 6ab851f8
	//TODO LDTRB 0xf0(R13), R10                // aa094f38
	//TODO LDTRH 0xe8(R13), R23                // b7894e78
	//TODO LDTRSB -0x24(R20), R5               // 85cadd38
	//TODO LDTRSB -0x75(R9), R13               // 2db99838
	//TODO LDTRSH 0xef(R3), LR                 // 7ef8ce78
	//TODO LDTRSH 0x96(R19), R24               // 786a8978

	VPGATHERQQ Y2, (BP)(Y7*2), Y1           // c4e2ed914c7d00
	VPGATHERQQ X12, (R13)(X14*2), X11       // c40299915c7500
	VPGATHERQQ Y12, (R13)(Y14*2), Y11       // c4029d915c7500
	VPGATHERQQ X2, (BP)(X7*2), X1           // c4e2e9914c7d00
	VPGATHERQQ Y2, (BP)(Y7*2), Y1           // c4e2ed914c7d00
	VPGATHERQQ X12, (R13)(X14*2), X11       // c40299915c7500
	VPGATHERQQ Y12, (R13)(Y14*2), Y11       // c4029d915c7500

	JMP	bar<>+4(SB)(R11*4)
	JCS	2(PC)
	JMP	*4(SP) // JMP 4(SP)
	JCS	2(PC)
	JMP	*(R12) // JMP (R12)
	JCS	2(PC)
//	JMP	*(R12*4) // TODO: This line is silently dropped on the floor!
	JCS	2(PC)
	JMP	*(R12)(R13*4) // JMP (R12)(R13*4)
	JCS	2(PC)
	JMP	*(AX) // JMP (AX)
	JCS	2(PC)
	JMP	*(SP) // JMP (SP)
	JCS	2(PC)
//	JMP	*(AX*4) // TODO: This line is silently dropped on the floor!
	JCS	2(PC)
	JMP	*(AX)(AX*4) // JMP (AX)(AX*4)

	{"-12(R4)", "-12(R4)"},
	{"0(PC)", "0(PC)"},
	{"1024", "1024"},
	{"12(R(1))", "12(R1)"},
	{"12(R13)", "12(R13)"},
	{"R0", "R0"},
	{"R0->(32-1)", "R0->31"},
	{"R0<<R1", "R0<<R1"},
	{"R0>>R(1)", "R0>>R1"},
	{"R0@>(32-1)", "R0@>31"},
	{"R1", "R1"},
	{"R11", "R11"},
	{"R12", "R12"},
	{"R13", "R13"},
	{"R14", "R14"},
	{"R15", "R15"},
	{"R1<<2(R3)", "R1<<2(R3)"},
	{"R(1)<<2(R(3))", "R1<<2(R3)"},

	CSINV	HS, R1, R2, R3	// 232082da
	CSINVW	MI, R2, ZR, R2	// 42409f5a
	CINC	EQ, R4, R9	// 8914849a
	CINCW	PL, R2, ZR	// 5f44821a
	CINV	PL, R11, R22	// 76418bda
	CINVW	LS, R7, R13	// ed80875a
	CNEG	LS, R13, R7	// a7858dda
	CNEGW	EQ, R8, R13	// 0d15885a

// atomic ops
	LDARB	(R25), R2                            // 22ffdf08
	LDARH	(R5), R7                             // a7fcdf48

	VLD1	(R8)(R13), [V2.B16]                              // ERROR "illegal combination"
	VLD1	8(R9), [V2.B16]                                  // ERROR "illegal combination"
	VST1	[V1.B16], (R8)(R13)                              // ERROR "illegal combination"
	VST1	[V1.B16], 9(R2)                                  // ERROR "illegal combination"

	}
	register["LR"] = s390x.REG_LR
	// Pseudo-registers.
	register["SB"] = RSB
	register["FP"] = RFP
	register["PC"] = RPC
	// Avoid unintentionally clobbering g using R13.
	delete(register, "R13")
	register["g"] = s390x.REG_R13
	registerPrefix := map[string]bool{
		"AR": true,
		"F":  true,
		"R":  true,
	}

	instructions := make(map[string]obj.As)
	for i, s := range obj.Anames {

	PSTH R1, $1, 12345678(R2)               // 061000bcb022614e
	PSTQ R2, $1, 12345678(R2)               // 041000bcf042614e
	PSTW R1, $1, 12345678(R2)               // 061000bc9022614e
	PSTW R24, $0, 45(R13)                   // 06000000930d002d
	PSTXSD V1, $1, 12345678(R2)             // 041000bcb822614e
	PSTXSSP V1, $1, 1234567890(R0)          // 04104996bc2002d2
	PSTXSSP V1, $1, 1234567890(R1)          // 04104996bc2102d2

The assembler uses them to hold temporary values when assembling some instructions.
</p>

<p>
<code>R13</code> points to the <code>g</code> (goroutine) structure.
This register must be referred to as <code>g</code>; the name <code>R13</code> is not recognized.
</p>

<p>
<code>R15</code> points to the stack frame and should typically only be accessed using the