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Results 1 - 5 of 5 for VLD1 (0.04 sec)

  1. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	VLD1.P (R19)(R4), [V24.B8, V25.B8]                          // 78a2c40c
    	VLD1.P (R20)(R8), [V7.H8, V8.H8, V9.H8]                     // 8766c84c
    	VLD1.P 32(R30), [V5.B8, V6.B8, V7.B8, V8.B8]                // c523df0c
    	VLD1 (R19), V14.B[15]                                       // 6e1e404d
    	VLD1 (R29), V0.H[1]                                         // a04b400d
    	VLD1 (R27), V2.S[0]                                         // 6283400d
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64error.s

    	VLD1	(R8)(R13), [V2.B16]                              // ERROR "illegal combination"
    	VLD1	8(R9), [V2.B16]                                  // ERROR "illegal combination"
    	VST1	[V1.B16], (R8)(R13)                              // ERROR "illegal combination"
    	VST1	[V1.B16], 9(R2)                                  // ERROR "illegal combination"
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Tue Oct 14 19:00:00 UTC 2025
    - 38.4K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64.s

    // store and load
    //
    // LD1/ST1
    	VLD1	(R8), [V1.B16, V2.B16]                          // 01a1404c
    	VLD1.P	(R3), [V31.H8, V0.H8]                           // 7fa4df4c
    	VLD1.P	(R8)(R20), [V21.B16, V22.B16]                   // 15a1d44c
    	VLD1.P	64(R1), [V5.B16, V6.B16, V7.B16, V8.B16]        // 2520df4c
    	VLD1.P	1(R0), V4.B[15]                                 // 041cdf4d
    	VLD1.P	2(R0), V4.H[7]                                  // 0458df4d
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Mon Nov 10 17:34:13 UTC 2025
    - 96.1K bytes
    - Viewed (0)
  4. lib/fips140/v1.1.0-rc1.zip

    MOVD $round_consts<>(SB), R1 MOVD $24, R2 // counter for loop VLD1.P 16(R0), [V0.D1, V1.D1] VLD1.P 16(R0), [V2.D1, V3.D1] VLD1.P 16(R0), [V4.D1, V5.D1] VLD1.P 16(R0), [V6.D1, V7.D1] VLD1.P 16(R0), [V8.D1, V9.D1] VLD1.P 16(R0), [V10.D1, V11.D1] VLD1.P 16(R0), [V12.D1, V13.D1] VLD1.P 16(R0), [V14.D1, V15.D1] VLD1.P 16(R0), [V16.D1, V17.D1] VLD1.P 16(R0), [V18.D1, V19.D1] VLD1.P 16(R0), [V20.D1, V21.D1] VLD1.P 16(R0), [V22.D1, V23.D1] VLD1 (R0), [V24.D1] SUB $192, R0, R0 loop: // theta VEOR3 V20.B16,...
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Dec 11 16:27:41 UTC 2025
    - 663K bytes
    - Viewed (0)
  5. lib/fips140/v1.0.0-c2097c7c.zip

    length MOVD $ยท_K+0(SB), R2 // k constants first address VLD1 (R0), [V0.S4, V1.S4] // load h(a,b,c,d,e,f,g,h) VLD1.P 64(R2), [V16.S4, V17.S4, V18.S4, V19.S4] VLD1.P 64(R2), [V20.S4, V21.S4, V22.S4, V23.S4] VLD1.P 64(R2), [V24.S4, V25.S4, V26.S4, V27.S4] VLD1 (R2), [V28.S4, V29.S4, V30.S4, V31.S4] //load 64*4bytes K constant(K0-K63) blockloop: VLD1.P 16(R1), [V4.B16] // load 16bytes message VLD1.P 16(R1), [V5.B16] // load 16bytes message VLD1.P 16(R1), [V6.B16] // load 16bytes message VLD1.P 16(R1),...
    Registered: Tue Dec 30 11:13:12 UTC 2025
    - Last Modified: Thu Sep 25 19:53:19 UTC 2025
    - 642.7K bytes
    - Viewed (0)
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