- Sort Score
- Result 10 results
- Languages All
Results 1 - 8 of 8 for SGTU (0.07 sec)
-
test/codegen/mathbits.go
// amd64:"NEGL","ADCQ","SBBQ","NEGQ" // loong64: "ADDV", "SGTU" // ppc64x: "ADDC", "ADDE", "ADDZE" // s390x:"ADDE","ADDC\t[$]-1," // mips64:"ADDV","SGTU" // riscv64: "ADD","SLTU" return bits.Add(x, 7, ci) } func AddZ(x, y uint) (r, co uint) { // arm64:"ADDS","ADC",-"ADCS",-"ADD\t",-"CMP" // amd64:"ADDQ","SBBQ","NEGQ",-"NEGL",-"ADCQ" // loong64: "ADDV", "SGTU" // ppc64x: "ADDC", -"ADDE", "ADDZE"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 18:51:17 UTC 2024 - 19.6K bytes - Viewed (0) -
src/runtime/memmove_loong64.s
TEXT runtime·memmove<ABIInternal>(SB), NOSPLIT|NOFRAME, $0-24 BNE R6, check RET check: SGTU R4, R5, R7 BNE R7, backward ADDV R4, R6, R9 // end pointer // if the two pointers are not of same alignments, do byte copying SUBVU R5, R4, R7 AND $7, R7 BNE R7, out // if less than 8 bytes, do byte copying SGTU $8, R6, R7 BNE R7, out // do one byte at a time until 8-aligned AND $7, R4, R8
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 1.8K bytes - Viewed (0) -
src/internal/bytealg/compare_loong64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 1.7K bytes - Viewed (0) -
src/runtime/memclr_loong64.s
ADDV R4, R5, R6 // if less than 8 bytes, do one byte at a time SGTU $8, R5, R8 BNE R8, out // do one byte at a time until 8-aligned AND $7, R4, R8 BEQ R8, words MOVB R0, (R4) ADDV $1, R4 JMP -4(PC) words: // do 8 bytes at a time if there is room ADDV $-7, R6, R5 PCALIGN $16 SGTU R5, R4, R8 BEQ R8, out MOVV R0, (R4) ADDV $8, R4 JMP -4(PC) out:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 766 bytes - Viewed (0) -
src/cmd/internal/obj/loong64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 1.9K bytes - Viewed (0) -
src/runtime/asm_mipsx.s
// we don't have variable-sized frames, so we use a small number // of constant-sized-frame functions to encode a few bits of size in the pc. #define DISPATCH(NAME,MAXSIZE) \ MOVW $MAXSIZE, R23; \ SGTU R1, R23, R23; \ BNE R23, 3(PC); \ MOVW $NAME(SB), R4; \ JMP (R4) TEXT ·reflectcall(SB),NOSPLIT|NOFRAME,$0-28 MOVW frameSize+20(FP), R1 DISPATCH(runtime·call16, 16) DISPATCH(runtime·call32, 32)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 06 11:46:29 UTC 2024 - 26.3K bytes - Viewed (0) -
src/runtime/asm_loong64.s
// of constant-sized-frame functions to encode a few bits of size in the pc. // Caution: ugly multiline assembly macros in your future! #define DISPATCH(NAME,MAXSIZE) \ MOVV $MAXSIZE, R30; \ SGTU R19, R30, R30; \ BNE R30, 3(PC); \ MOVV $NAME(SB), R4; \ JMP (R4) // Note: can't just "BR NAME(SB)" - bad inlining results. TEXT ·reflectcall(SB), NOSPLIT|NOFRAME, $0-48 MOVWU frameSize+32(FP), R19
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 26.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, outputs: []outputInfo{ {0, 1071644664}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R23 R24 R25 R26 R27 R28 R29 R31 }, }, }, { name: "SGTU", argLen: 2, asm: loong64.ASGTU, reg: regInfo{ inputs: []inputInfo{ {0, 1073741816}, // R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 g R23 R24 R25 R26 R27 R28 R29 R31
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)