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Results 1 - 5 of 5 for ORN (0.02 sec)

  1. src/cmd/internal/obj/riscv/anames.go

    	"SBREAK",
    	"MRET",
    	"SRET",
    	"DRET",
    	"WFI",
    	"SFENCEVMA",
    	"ADDUW",
    	"SH1ADD",
    	"SH1ADDUW",
    	"SH2ADD",
    	"SH2ADDUW",
    	"SH3ADD",
    	"SH3ADDUW",
    	"SLLIUW",
    	"ANDN",
    	"ORN",
    	"XNOR",
    	"CLZ",
    	"CLZW",
    	"CTZ",
    	"CTZW",
    	"CPOP",
    	"CPOPW",
    	"MAX",
    	"MAXU",
    	"MIN",
    	"MINU",
    	"SEXTB",
    	"SEXTH",
    	"ZEXTH",
    	"ROL",
    	"ROLW",
    	"ROR",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 2.9K bytes
    - Viewed (0)
  2. test/codegen/bits.go

    }
    
    func and_mask_3(a, b uint32) (uint32, uint32) {
    	// arm/7:`BIC`,-`AND`
    	a &= 0xffffaaaa
    	// arm/7:`BFC`,-`AND`,-`BIC`
    	b &= 0xffc003ff
    	return a, b
    }
    
    // Check generation of arm64 BIC/EON/ORN instructions
    
    func op_bic(x, y uint32) uint32 {
    	// arm64:`BIC\t`,-`AND`
    	return x &^ y
    }
    
    func op_eon(x, y, z uint32, a []uint32, n, m uint64) uint64 {
    	// arm64:`EON\t`,-`EOR`,-`MVN`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 7.8K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/ppc64/anames.go

    	"MULHWU",
    	"MULHWUCC",
    	"MULLW",
    	"MULLWCC",
    	"MULLWVCC",
    	"MULLWV",
    	"NAND",
    	"NANDCC",
    	"NEG",
    	"NEGCC",
    	"NEGVCC",
    	"NEGV",
    	"NOR",
    	"NORCC",
    	"OR",
    	"ORCC",
    	"ORN",
    	"ORNCC",
    	"ORIS",
    	"REM",
    	"REMU",
    	"RFI",
    	"RLWMI",
    	"RLWMICC",
    	"RLWNM",
    	"RLWNMCC",
    	"CLRLSLWI",
    	"SLW",
    	"SLWCC",
    	"SRW",
    	"SRAW",
    	"SRAWCC",
    	"SRWCC",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  4. src/crypto/md5/md5block_ppc64x.s

    	ADD	R9, a; \
    	XOR	d, c, R31; \
    	XOR	b, R31; \
    	ADD	R31, a; \
    	ROTLW	$shift, a; \
    	ADD	b, a;
    
    #define ROUND4(a, b, c, d, index, const, shift) \
    	ADD	$const, index, R9; \
    	ADD	R9, a; \
    	ORN     d, b, R31; \
    	XOR	c, R31; \
    	ADD	R31, a; \
    	ROTLW	$shift, a; \
    	ADD	b, a;
    
    
    TEXT ·block(SB),NOSPLIT,$0-32
    	MOVD	dig+0(FP), R10
    	MOVD	p+8(FP), R6
    	MOVD	p_len+16(FP), R5
    
    	// We assume p_len >= 64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 20 18:05:32 UTC 2024
    - 5.3K bytes
    - Viewed (0)
  5. test/codegen/rotate.go

    	// arm64: "BIC\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
    	a[13] = a[12] &^ bits.RotateLeft64(a[11], 13)
    	// arm64: "EON\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
    	a[16] = a[15] ^ ^bits.RotateLeft64(a[14], 13)
    	// arm64: "ORN\tR[0-9]+@>51, R[0-9]+, R[0-9]+"
    	a[19] = a[18] | ^bits.RotateLeft64(a[17], 13)
    	// arm64: "TST\tR[0-9]+@>51, R[0-9]+"
    	if a[18]&bits.RotateLeft64(a[19], 13) == 0 {
    		a[20] = 1
    	}
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 14:57:07 UTC 2024
    - 6K bytes
    - Viewed (0)
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