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Results 1 - 10 of 17 for r28 (0.08 sec)
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src/runtime/mkpreempt.go
mov := "MOVW" movf := "MOVF" add := "ADD" sub := "SUB" r28 := "R28" regsize := 4 softfloat := "GOMIPS_softfloat" if _64bit { mov = "MOVV" movf = "MOVD" add = "ADDV" sub = "SUBV" r28 = "RSB" regsize = 8 softfloat = "GOMIPS64_softfloat" } // Add integer registers R1-R22, R24-R25, R28 // R0 (zero), R23 (REGTMP), R29 (SP), R30 (g), R31 (LR) are special,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 15.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/operand_test.go
{"R18", "R18"}, {"R19", "R19"}, {"R2", "R2"}, {"R20", "R20"}, {"R21", "R21"}, {"R22", "R22"}, {"R23", "R23"}, {"R24", "R24"}, {"R25", "R25"}, {"R26", "R26"}, {"R27", "R27"}, {"R28", "R28"}, {"R29", "R29"}, {"R3", "R3"}, {"R31", "R31"}, {"R4", "R4"}, {"R5", "R5"}, {"R6", "R6"}, {"R7", "R7"}, {"R8", "R8"}, {"R9", "R9"}, {"SPR(269)", "SPR(269)"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 29 18:31:05 UTC 2023 - 23.9K bytes - Viewed (0) -
src/cmd/asm/internal/arch/arch.go
register["LR"] = arm64.REGLINK // Pseudo-registers. register["SB"] = RSB register["FP"] = RFP register["PC"] = RPC register["SP"] = RSP // Avoid unintentionally clobbering g using R28. delete(register, "R28") register["g"] = arm64.REG_R28 registerPrefix := map[string]bool{ "F": true, "R": true, "V": true, } instructions := make(map[string]obj.As) for i, s := range obj.Anames {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 21 06:51:28 UTC 2023 - 21.3K bytes - Viewed (0) -
src/hash/crc32/crc32_ppc64le.s
MOVWZ (R10)(R25),R27 // tab[6][crc>>8&0xFF] ADD $1024,R10,R10 // &tab[7] SLD $2,R26,R26 // crc&0xFF*2 XOR R21,R27,R21 // xor done R27 ADD $8,R5 // p = p[8:] MOVWZ (R10)(R26),R28 // tab[7][crc&0xFF] XOR R21,R28,R21 // xor done R28 MOVWZ R21,R7 // crc for next round BDNZ loop ANDCC $7,R6,R8 // any leftover bytes BEQ done // none --> done MOVD R8,CTR // byte count PCALIGN $16 // align short loop
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 06 12:09:50 UTC 2024 - 13.1K bytes - Viewed (0) -
src/runtime/race_arm64.s
// A brief recap of the arm64 calling convention. // Arguments are passed in R0...R7, the rest is on stack. // Callee-saved registers are: R19...R28. // Temporary registers are: R9...R15 // SP must be 16-byte aligned. // When calling racecalladdr, R9 is the call target address. // The race ctx, ThreadState *thr below, is passed in R0 and loaded in racecalladdr.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 18:37:29 UTC 2024 - 15.5K bytes - Viewed (0) -
src/runtime/asm_ppc64x.s
MOVD R19, 200(R1) MOVD R20, 208(R1) MOVD R21, 216(R1) MOVD R22, 224(R1) MOVD R23, 232(R1) MOVD R24, 240(R1) MOVD R25, 248(R1) MOVD R26, 256(R1) MOVD R27, 264(R1) MOVD R28, 272(R1) MOVD R29, 280(R1) MOVD g, 288(R1) MOVD LR, R31 MOVD R31, 32(R1) CALL runtime·debugCallCheck(SB) MOVD 40(R1), R22 XOR R0, R0 CMP R22, $0 BEQ good MOVD 48(R1), R22
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 45.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPSOps.go
"R11", "R12", "R13", "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21", "R22", //REGTMP "R24", "R25", // R26 reserved by kernel // R27 reserved by kernel "R28", "SP", // aka R29 "g", // aka R30 "R31", // REGLINK // odd FP registers contain high parts of 64-bit FP values "F0", "F2", "F4", "F6", "F8", "F10", "F12", "F14", "F16",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 24K bytes - Viewed (0) -
src/runtime/asm_loong64.s
// R22 is g. MOVV R23, 160(R3) MOVV R24, 168(R3) MOVV R25, 176(R3) MOVV R26, 184(R3) // R27 already saved // R28 already saved. MOVV R29, 192(R3) // R30 is tmp register. MOVV R31, 200(R3) CALL runtime·wbBufFlush(SB) MOVV 8(R3), R27 MOVV 16(R3), R28 MOVV 24(R3), R2 MOVV 32(R3), R4 MOVV 40(R3), R5 MOVV 48(R3), R6 MOVV 56(R3), R7 MOVV 64(R3), R8 MOVV 72(R3), R9
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 26.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:19 UTC 2023 - 25.2K bytes - Viewed (0) -
src/crypto/sha512/sha512block_ppc64x.s
#define R_x050 R15 #define R_x060 R16 #define R_x070 R17 #define R_x080 R18 #define R_x090 R19 #define R_x0a0 R20 #define R_x0b0 R21 #define R_x0c0 R22 #define R_x0d0 R23 #define R_x0e0 R24 #define R_x0f0 R28 #define R_x100 R29 #define R_x110 R27 // V0-V7 are A-H // V8-V23 are used for the message schedule #define KI V24 #define FUNC V25 #define S0 V26 #define S1 V27 #define s0 V28 #define s1 V29
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 15.8K bytes - Viewed (0)