a{\rtf1\mac\ansicpg10000\cocoartf824\cocoasubrtf410 {\fonttbl\f0\fswiss\fcharset77 Helvetica-Oblique;} {\colortbl;\red255\green255\blue255;} \pard\tx560\tx1120\tx1680\tx2240\tx2800\tx3360\tx3920\tx4480\tx5040\tx5600\tx6160\tx6720\qc\pardirnatural \f0\i\fs24 \cf0 deprecated,\ marked for refactor}Bounds{{584.742, 252.673}, {104, 28}}ClassShapedGraphicFi.45520344376564026Rot{\rtf1\mac\ansicpg10000\cocoartf824\cocoasubrtf410 {\fonttbl\f0\fswiss\fcharset77 Helvetica-Oblique;} {\colortbl;\red255\green255\blue255;}...

	FCVTLS.RUP	F0, X5				// d33220c0
	FCVTLS.RMM	F0, X5				// d34220c0
	FCVTSW	X5, F0					// 538002d0
	FCVTSL	X5, F0					// 538022d0
	FCVTWUS	F0, X5					// d31210c0
	FCVTWUS.RNE	F0, X5				// d30210c0
	FCVTWUS.RTZ	F0, X5				// d31210c0
	FCVTWUS.RDN	F0, X5				// d32210c0
	FCVTWUS.RUP	F0, X5				// d33210c0
	FCVTWUS.RMM	F0, X5				// d34210c0
	FCVTLUS	F0, X5					// d31230c0
	FCVTLUS.RNE	F0, X5				// d30230c0

	NMULSD	F0, F1             // ERROR "illegal combination"
	NMULSF	F0, F1             // ERROR "illegal combination"
	FMULAD	F0, F1             // ERROR "illegal combination"
	FMULAF	F0, F1             // ERROR "illegal combination"
	FMULSD	F0, F1             // ERROR "illegal combination"
	FMULSF	F0, F1             // ERROR "illegal combination"
	FNMULAD	F0, F1             // ERROR "illegal combination"

	MOVF	F2, 0x00ffffff(R2) // MOVF F2, 16777215(R2)
	MOVD	F2, 0x00ffffff(R2) // MOVD F2, 16777215(R2)
	MOVF	F0, math·Exp(SB)   // MOVF F0, math.Exp(SB)
	MOVF	math·Exp(SB), F0   // MOVF math.Exp(SB), F0
	MOVD	F0, math·Exp(SB)   // MOVD F0, math.Exp(SB)
	MOVD	math·Exp(SB), F0   // MOVD math.Exp(SB), F0
	MOVF	F4, F5                                    // 445ab0ee
	MOVD	F6, F7                                    // 467bb0ee

		}
		if i == riscv.REG_TP || i == riscv.REG_G {
			continue
		}
		name := fmt.Sprintf("X%d", i-riscv.REG_X0)
		register[name] = int16(i)
	}
	for i := riscv.REG_F0; i <= riscv.REG_F31; i++ {
		name := fmt.Sprintf("F%d", i-riscv.REG_F0)
		register[name] = int16(i)
	}

	// General registers with ABI names.
	register["ZERO"] = riscv.REG_ZERO
	register["RA"] = riscv.REG_RA
	register["SP"] = riscv.REG_SP

  # Get trace ID from TRACEPARENT, if present
  local tid
  tid="$(<<<"${TRACEPARENT:-}" cut -d- -f2)"
  tid="${tid:-"$(tr -dc 'a-f0-9' < /dev/urandom | head -c 32)"}"
  # Always generate a new span ID
  local sid
  sid="$(tr -dc 'a-f0-9' < /dev/urandom | head -c 16)"

  # Execute the command they wanted with the propagation through TRACEPARENT
  if [[ $was_execution_trace == 1 ]]; then

		t.Fatal(err)
	}

	// read back zip file and check that we get to the end of it
	r, err := NewReader(buf, buf.Size())
	if err != nil {
		t.Fatal("reader:", err)
	}
	f0 := r.File[0]
	rc, err := f0.Open()
	if err != nil {
		t.Fatal("opening:", err)
	}
	rc.(*checksumReader).hash = fakeHash32{}
	for i := 0; i < chunks; i++ {
		_, err := io.ReadFull(rc, chunk)
		if err != nil {

	FMOVS	4095(R2)(R3), F13      // 78d32fff
	FMOVS	4096(R2)(R4), F15      // edf420000164
	FMOVD	F0, 4095(R1)           // 60001fff
	FMOVD	F0, 4096(R1)           // ed0010000167
	FMOVS	F13, 4095(R2)(R3)      // 70d32fff
	FMOVS	F13, 4096(R2)(R3)      // edd320000166

	FADDS	F0, F15                // b30a00f0
	FADD	F1, F14                // b31a00e1
	FSUBS	F2, F13                // b30b00d2

func s390xRegisterNumber(name string, n int16) (int16, bool) {
	switch name {
	case "AR":
		if 0 <= n && n <= 15 {
			return s390x.REG_AR0 + n, true
		}
	case "F":
		if 0 <= n && n <= 15 {
			return s390x.REG_F0 + n, true
		}
	case "R":
		if 0 <= n && n <= 15 {
			return s390x.REG_R0 + n, true
		}
	case "V":
		if 0 <= n && n <= 31 {
			return s390x.REG_V0 + n, true
		}
	}
	return 0, false

		mips.AMADD, mips.AMSUB:
		return true
	}
	return false
}

func mipsRegisterNumber(name string, n int16) (int16, bool) {
	switch name {
	case "F":
		if 0 <= n && n <= 31 {
			return mips.REG_F0 + n, true
		}
	case "FCR":
		if 0 <= n && n <= 31 {
			return mips.REG_FCR0 + n, true
		}
	case "M":
		if 0 <= n && n <= 31 {
			return mips.REG_M0 + n, true
		}
	case "R":
		if 0 <= n && n <= 31 {