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Results 1 - 6 of 6 for R22 (0.17 sec)

  1. src/cmd/asm/internal/asm/testdata/mips64.s

    //	LSHW imm ',' sreg ',' rreg
    //	{
    //		outcode(int($1), &$2, int($4), &$6);
    //	}
    	SLL	$19, R22, R21	// 0016acc0
    	SLLV	$19, R22, R21	// 0016acf8
    	SRL	$31, R6, R17	// 00068fc2
    	SRLV	$31, R6, R17	// 00068ffa
    	SRA	$8, R8, R19	// 00089a03
    	SRAV	$19, R8, R7	// 00083cfb
    	ROTR	$12, R8, R3	// 00281b02
    	ROTRV	$8, R22, R22	// 0036b23a
    
    //	LSHW imm ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	ISB $15                                    // df3f03d5
    	LDARW (R12), R29                           // 9dfddf88
    	LDARW (R30), R22                           // d6ffdf88
    	LDARW (RSP), R22                           // f6ffdf88
    	LDAR (R27), R22                            // 76ffdfc8
    	LDARB (R25), R2                            // 22ffdf08
    	LDARH (R5), R7                             // a7fcdf48
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64.s

    	MSR	R6, APDBKeyHi_EL1                  // 662218d5
    	MRS	APDBKeyLo_EL1, R5                  // 452238d5
    	MSR	R22, APDBKeyLo_EL1                 // 562218d5
    	MRS	APGAKeyHi_EL1, R22                 // 362338d5
    	MSR	R5, APGAKeyHi_EL1                  // 252318d5
    	MRS	APGAKeyLo_EL1, R16                 // 102338d5
    	MSR	R22, APGAKeyLo_EL1                 // 162318d5
    	MRS	APIAKeyHi_EL1, R23                 // 372138d5
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Mar 26 10:48:50 UTC 2025
    - 95.3K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/operand_test.go

    	{"R12", "R12"},
    	{"R13", "R13"},
    	{"R14", "R14"},
    	{"R15", "R15"},
    	{"R16", "R16"},
    	{"R17", "R17"},
    	{"R18", "R18"},
    	{"R19", "R19"},
    	{"R2", "R2"},
    	{"R20", "R20"},
    	{"R21", "R21"},
    	{"R22", "R22"},
    	{"R23", "R23"},
    	{"R24", "R24"},
    	{"R25", "R25"},
    	{"R26", "R26"},
    	{"R27", "R27"},
    	{"R28", "R28"},
    	{"R29", "R29"},
    	{"R3", "R3"},
    	{"R31", "R31"},
    	{"R4", "R4"},
    	{"R5", "R5"},
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Aug 29 18:31:05 UTC 2023
    - 23.9K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/arch/arch.go

    		register[obj.Rconv(i)] = int16(i)
    	}
    
    	// Pseudo-registers.
    	register["SB"] = RSB
    	register["FP"] = RFP
    	register["PC"] = RPC
    	// Avoid unintentionally clobbering g using R22.
    	delete(register, "R22")
    	register["g"] = loong64.REG_R22
    	registerPrefix := map[string]bool{
    		"F":    true,
    		"FCSR": true,
    		"FCC":  true,
    		"R":    true,
    		"V":    true,
    		"X":    true,
    	}
    
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Nov 07 02:20:14 UTC 2024
    - 21.7K bytes
    - Viewed (0)
  6. lib/fips140/v1.0.0.zip

    (R16, R17) LDP 1*16(b_ptr), (R19, R20) LDP 2*16(b_ptr), (R21, R22) CSEL EQ, R16, R4, R4 CSEL EQ, R17, R5, R5 CSEL EQ, R19, R6, R6 CSEL EQ, R20, R7, R7 CSEL EQ, R21, R8, R8 CSEL EQ, R22, R9, R9 STP (R4, R5), 0*16(res_ptr) STP (R6, R7), 1*16(res_ptr) STP (R8, R9), 2*16(res_ptr) LDP 3*16(a_ptr), (R4, R5) LDP 4*16(a_ptr), (R6, R7) LDP 5*16(a_ptr), (R8, R9) LDP 3*16(b_ptr), (R16, R17) LDP 4*16(b_ptr), (R19, R20) LDP 5*16(b_ptr), (R21, R22) CSEL EQ, R16, R4, R4 CSEL EQ, R17, R5, R5 CSEL EQ, R19, R6, R6...
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Wed Jan 29 15:10:35 UTC 2025
    - 635K bytes
    - Viewed (0)
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