func (c *sigctxt) r24() uint64 { return (uint64)(c.regs().sc_x[24]) }
func (c *sigctxt) r25() uint64 { return (uint64)(c.regs().sc_x[25]) }
func (c *sigctxt) r26() uint64 { return (uint64)(c.regs().sc_x[26]) }
func (c *sigctxt) r27() uint64 { return (uint64)(c.regs().sc_x[27]) }
func (c *sigctxt) r28() uint64 { return (uint64)(c.regs().sc_x[28]) }
func (c *sigctxt) r29() uint64 { return (uint64)(c.regs().sc_x[29]) }

	// can be executed on g0. Second, it is called frequently, so will
	// benefit from this fast path.
	CBNZ	R0, rest
	MOVD	g, R13
#ifdef TLS_darwin
	MOVD	R27, R12 // save R27 a.k.a. REGTMP (callee-save in C). load_g clobbers it
#endif
	load_g
#ifdef TLS_darwin
	MOVD	R12, R27
#endif
	MOVD	g_m(g), R0
	MOVD	m_p(R0), R0
	MOVD	p_raceprocctx(R0), R0
	MOVD	R0, (R1)
	MOVD	R13, g
	JMP	(LR)
rest:

	RLDICL	$56,R7,$56,R25	// crc>>8
	ADD	$1024,R10,R10	// &tab[6]
	SLD	$2,R25,R25	// crc>>8&FF*2
	MOVBZ   R7,R26          // crc&0xFF
	MOVWZ	(R10)(R25),R27	// tab[6][crc>>8&0xFF]
	ADD 	$1024,R10,R10   // &tab[7]
	SLD	$2,R26,R26	// crc&0xFF*2
	XOR	R21,R27,R21	// xor done R27
	ADD     $8,R5           // p = p[8:]
	MOVWZ	(R10)(R26),R28	// tab[7][crc&0xFF]
	XOR	R21,R28,R21	// xor done R28
	MOVWZ	R21,R7		// crc for next round

(2) MADD, MADDW, MSUB, MSUBW, SMADDL, SMSUBL, UMADDL, UMSUBL <Rm>, <Ra>, <Rn>, <Rd>

Examples:

	MADD R2, R30, R22, R6       <=>    madd x6, x22, x2, x30
	SMSUBL R10, R3, R17, R27    <=>    smsubl x27, w17, w10, x3

(3) FMADDD, FMADDS, FMSUBD, FMSUBS, FNMADDD, FNMADDS, FNMSUBD, FNMSUBS <Fm>, <Fa>, <Fn>, <Fd>

Examples:

	FMADDD F30, F20, F3, F29    <=>    fmadd d29, d3, d30, d20

#define ENDIAN_MOVE(off, ptr, dst, idx) \
	MOVD	$off,idx; \
	MOVWBR	(idx)(ptr), dst
#endif

#define M00 R18
#define M01 R19
#define M02 R20
#define M03 R24
#define M04 R25
#define M05 R26
#define M06 R27
#define M07 R28
#define M08 R29
#define M09 R21
#define M10 R11
#define M11 R8
#define M12 R7
#define M13 R12
#define M14 R23
#define M15 R10

#define ROUND1(a, b, c, d, index, const, shift) \

 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

package org.gradle.integtests.tooling.r27


import org.gradle.integtests.tooling.TestLauncherSpec
import org.gradle.integtests.tooling.fixture.TargetGradleVersion
import org.gradle.tooling.BuildException
import org.gradle.tooling.TestExecutionException

	MOVD	R18, 192(R1)
	MOVD	R19, 200(R1)
	MOVD	R20, 208(R1)
	MOVD	R21, 216(R1)
	MOVD	R22, 224(R1)
	MOVD	R23, 232(R1)
	MOVD	R24, 240(R1)
	MOVD	R25, 248(R1)
	MOVD	R26, 256(R1)
	MOVD	R27, 264(R1)
	MOVD	R28, 272(R1)
	MOVD	R29, 280(R1)
	MOVD	g, 288(R1)
	MOVD	LR, R31
	MOVD	R31, 32(R1)
	CALL	runtime·debugCallCheck(SB)
	MOVD	40(R1), R22
	XOR	R0, R0
	CMP	R22, $0
	BEQ	good

	MOVV	R21, 152(R3)
	// R22 is g.
	MOVV	R23, 160(R3)
	MOVV	R24, 168(R3)
	MOVV	R25, 176(R3)
	MOVV	R26, 184(R3)
	// R27 already saved
	// R28 already saved.
	MOVV	R29, 192(R3)
	// R30 is tmp register.
	MOVV	R31, 200(R3)

	CALL	runtime·wbBufFlush(SB)

	MOVV	8(R3), R27
	MOVV	16(R3), R28
	MOVV	24(R3), R2
	MOVV	32(R3), R4
	MOVV	40(R3), R5
	MOVV	48(R3), R6
	MOVV	56(R3), R7

	"R7",
	"R8",
	"R9",
	"R10",
	"R11",
	"R12",
	"R13",
	"R14",
	"R15",
	"R16",
	"R17",
	"R18",
	"R19",
	"R20",
	"R21",
	"g", // aka R22
	"R23",
	"R24",
	"R25",
	"R26",
	"R27",
	"R28",
	"R29",
	// R30 is REGTMP not used in regalloc
	"R31",

	"F0",
	"F1",
	"F2",
	"F3",
	"F4",
	"F5",
	"F6",
	"F7",
	"F8",
	"F9",
	"F10",
	"F11",
	"F12",
	"F13",

	PPC64DWARFRegisters[REG_CTR] = 66
	PPC64DWARFRegisters[REG_XER] = 76
}

/*
 * GENERAL:
 *
 * compiler allocates R3 up as temps
 * compiler allocates register variables R7-R27
 * compiler allocates external registers R30 down
 *
 * compiler allocates register variables F17-F26
 * compiler allocates external registers F26 down
 */
const (
	BIG = 32768 - 8
)

const (