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Results 1 - 10 of 10 for ubfiz1 (0.14 sec)

  1. test/codegen/bitfield.go

    	return uint64(x+1) << 3 // arm64:"UBFIZ\t[$]3, R[0-9]+, [$]8",-"LSL"
    }
    
    func ubfiz5(x uint8) uint64 {
    	return uint64(x) << 60 // arm64:"UBFIZ\t[$]60, R[0-9]+, [$]4",-"LSL"
    }
    
    func ubfiz6(x uint32) uint64 {
    	return uint64(x << 30) // arm64:"UBFIZ\t[$]30, R[0-9]+, [$]2",
    }
    
    func ubfiz7(x uint16) uint64 {
    	return uint64(x << 10) // arm64:"UBFIZ\t[$]10, R[0-9]+, [$]6",
    }
    
    func ubfiz8(x uint8) uint64 {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 23 06:11:32 UTC 2022
    - 9.6K bytes
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  2. src/cmd/internal/obj/arm64/anames.go

    	"SWPLD",
    	"SWPLH",
    	"SWPLW",
    	"SWPW",
    	"SXTB",
    	"SXTBW",
    	"SXTH",
    	"SXTHW",
    	"SXTW",
    	"SYS",
    	"SYSL",
    	"TBNZ",
    	"TBZ",
    	"TLBI",
    	"TST",
    	"TSTW",
    	"UBFIZ",
    	"UBFIZW",
    	"UBFM",
    	"UBFMW",
    	"UBFX",
    	"UBFXW",
    	"UCVTFD",
    	"UCVTFS",
    	"UCVTFWD",
    	"UCVTFWS",
    	"UDIV",
    	"UDIVW",
    	"UMADDL",
    	"UMNEGL",
    	"UMSUBL",
    	"UMULH",
    	"UMULL",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 18 01:40:37 UTC 2023
    - 5.4K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/arm64/doc.go

    	FMADDD F30, F20, F3, F29    <=>    fmadd d29, d3, d30, d20
    	FNMSUBS F7, F25, F7, F22    <=>    fnmsub s22, s7, s7, s25
    
    (4) BFI, BFXIL, SBFIZ, SBFX, UBFIZ, UBFX $<lsb>, <Rn>, $<width>, <Rd>
    
    Examples:
    
    	BFIW $16, R20, $6, R0      <=>    bfi w0, w20, #16, #6
    	UBFIZ $34, R26, $5, R20    <=>    ubfiz x20, x26, #34, #5
    
    (5) FCCMPD, FCCMPS, FCCMPED, FCCMPES <cond>, Fm. Fn, $<nzcv>
    
    Examples:
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 07 00:21:42 UTC 2023
    - 9.6K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/ARM64.rules

    // ubfiz
    // (x << lc) >> rc
    (SRLconst [rc] (SLLconst [lc] x)) && lc > rc => (UBFIZ [armBFAuxInt(lc-rc, 64-lc)] x)
    // uint64(x) << lc
    (SLLconst [lc] (MOVWUreg x))  => (UBFIZ [armBFAuxInt(lc, min(32, 64-lc))] x)
    (SLLconst [lc] (MOVHUreg x))  => (UBFIZ [armBFAuxInt(lc, min(16, 64-lc))] x)
    (SLLconst [lc] (MOVBUreg x))  => (UBFIZ [armBFAuxInt(lc, min(8,  64-lc))] x)
    // uint64(x << lc)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 113.1K bytes
    - Viewed (0)
  5. src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/tables.go

    	UABDL:     "UABDL",
    	UABDL2:    "UABDL2",
    	UADALP:    "UADALP",
    	UADDL:     "UADDL",
    	UADDL2:    "UADDL2",
    	UADDLP:    "UADDLP",
    	UADDLV:    "UADDLV",
    	UADDW:     "UADDW",
    	UADDW2:    "UADDW2",
    	UBFIZ:     "UBFIZ",
    	UBFM:      "UBFM",
    	UBFX:      "UBFX",
    	UCVTF:     "UCVTF",
    	UDIV:      "UDIV",
    	UHADD:     "UHADD",
    	UHSUB:     "UHSUB",
    	UMADDL:    "UMADDL",
    	UMAX:      "UMAX",
    	UMAXP:     "UMAXP",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Aug 16 17:57:48 UTC 2017
    - 211.8K bytes
    - Viewed (0)
  6. src/cmd/internal/obj/arm64/a.out.go

    	ASWPD
    	ASWPH
    	ASWPLB
    	ASWPLD
    	ASWPLH
    	ASWPLW
    	ASWPW
    	ASXTB
    	ASXTBW
    	ASXTH
    	ASXTHW
    	ASXTW
    	ASYS
    	ASYSL
    	ATBNZ
    	ATBZ
    	ATLBI
    	ATST
    	ATSTW
    	AUBFIZ
    	AUBFIZW
    	AUBFM
    	AUBFMW
    	AUBFX
    	AUBFXW
    	AUCVTFD
    	AUCVTFS
    	AUCVTFWD
    	AUCVTFWS
    	AUDIV
    	AUDIVW
    	AUMADDL
    	AUMNEGL
    	AUMSUBL
    	AUMULH
    	AUMULL
    	AUREM
    	AUREMW
    	AUXTB
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 18 17:56:30 UTC 2023
    - 18.1K bytes
    - Viewed (0)
  7. src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/plan9x.go

    			if rno <= uint16(WZR) {
    				op += "W"
    			}
    		}
    		args[1], args[2] = args[2], args[1]
    
    	case STLXRB, STLXRH, STXRB, STXRH:
    		args[1], args[2] = args[2], args[1]
    
    	case BFI, BFXIL, SBFIZ, SBFX, UBFIZ, UBFX:
    		if r, ok := inst.Args[0].(Reg); ok {
    			rno := uint16(r)
    			if rno <= uint16(WZR) {
    				op += "W"
    			}
    		}
    		args[1], args[2], args[3] = args[3], args[1], args[2]
    
    	case LDAXP, LDXP:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 16 22:24:28 UTC 2022
    - 17K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/rewriteARM64.go

    		v.AddArg(x)
    		return true
    	}
    	// match: (SLLconst [sc] (UBFIZ [bfc] x))
    	// cond: sc+bfc.getARM64BFwidth()+bfc.getARM64BFlsb() < 64
    	// result: (UBFIZ [armBFAuxInt(bfc.getARM64BFlsb()+sc, bfc.getARM64BFwidth())] x)
    	for {
    		sc := auxIntToInt64(v.AuxInt)
    		if v_0.Op != OpARM64UBFIZ {
    			break
    		}
    		bfc := auxIntToArm64BitField(v_0.AuxInt)
    		x := v_0.Args[0]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 608.6K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/arm64/asm7.go

    			oprangeset(ABFIW, t)
    			oprangeset(ABFXIL, t)
    			oprangeset(ABFXILW, t)
    			oprangeset(ASBFIZ, t)
    			oprangeset(ASBFIZW, t)
    			oprangeset(ASBFX, t)
    			oprangeset(ASBFXW, t)
    			oprangeset(AUBFIZ, t)
    			oprangeset(AUBFIZW, t)
    			oprangeset(AUBFX, t)
    			oprangeset(AUBFXW, t)
    
    		case AEXTR:
    			oprangeset(AEXTRW, t)
    
    		case ASXTB:
    			oprangeset(ASXTBW, t)
    			oprangeset(ASXTH, t)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 201.1K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/opGen.go

    				{0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30
    			},
    		},
    	},
    	{
    		name:    "UBFIZ",
    		auxType: auxARM64BitField,
    		argLen:  1,
    		asm:     arm64.AUBFIZ,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 805044223}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 g R30
    			},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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