MOVD	y+8(FP), R1
	CMN	R0, R1
	WORD	$0xd53b4200 //	MOVD	NZCV, R0
	MOVD	R0, ret+16(FP)
	RET

TEXT ·asmSubFlags(SB),NOSPLIT,$0-24
	MOVD	x+0(FP), R0
	MOVD	y+8(FP), R1
	CMP	R1, R0
	WORD	$0xd53b4200 //	MOVD	NZCV, R0
	MOVD	R0, ret+16(FP)
	RET

TEXT ·asmAndFlags(SB),NOSPLIT,$0-24
	MOVD	x+0(FP), R0
	MOVD	y+8(FP), R1
	TST	R1, R0
	WORD	$0xd53b4200 //	MOVD	NZCV, R0

	STP (R10, R11), 88(RSP)
	STP (R12, R13), 104(RSP)
	STP (R14, R15), 120(RSP)
	STP (R16, R17), 136(RSP)
	STP (R19, R20), 152(RSP)
	STP (R21, R22), 168(RSP)
	STP (R23, R24), 184(RSP)
	STP (R25, R26), 200(RSP)
	MOVD NZCV, R0
	MOVD R0, 216(RSP)
	MOVD FPSR, R0
	MOVD R0, 224(RSP)
	FSTPD (F0, F1), 232(RSP)
	FSTPD (F2, F3), 248(RSP)
	FSTPD (F4, F5), 264(RSP)
	FSTPD (F6, F7), 280(RSP)
	FSTPD (F8, F9), 296(RSP)

(5) FCCMPD, FCCMPS, FCCMPED, FCCMPES <cond>, Fm. Fn, $<nzcv>

Examples:

	FCCMPD AL, F8, F26, $0     <=>    fccmp d26, d8, #0x0, al
	FCCMPS VS, F29, F4, $4     <=>    fccmp s4, s29, #0x4, vs
	FCCMPED LE, F20, F5, $13   <=>    fccmpe d5, d20, #0xd, le
	FCCMPES NE, F26, F10, $0   <=>    fccmpe s10, s26, #0x0, ne

(6) CCMN, CCMNW, CCMP, CCMPW <cond>, <Rn>, $<imm>, $<nzcv>

Examples:

	// check there is enough to copy after alignment
	SUB	R4, R1, R3

	// Check that the remaining length to ZVA after alignment
	// is greater than 64.
	CMP	$64, R3
	CCMP	GE, R3, R5, $10  // condition code GE, NZCV=0b1010
	BLT	no_zva

	// We now have at least 64 bytes to zero, update n
	MOVD	R3, R1

loop_zva_prolog:
	STP	(ZR, ZR), (R0)
	STP	(ZR, ZR), 16(R0)
	STP	(ZR, ZR), 32(R0)
	SUBS	$64, R4, R4

	// CCMN <Wn>, #<imm>, #<nzcv>, <cond>
	{0xffe00c10, 0x3a400800, CCMN, instArgs{arg_Wn, arg_immediate_0_31_imm5, arg_immediate_0_15_nzcv, arg_cond_AllowALNV_Normal}, nil},
	// CCMN <Xn>, #<imm>, #<nzcv>, <cond>
	{0xffe00c10, 0xba400800, CCMN, instArgs{arg_Xn, arg_immediate_0_31_imm5, arg_immediate_0_15_nzcv, arg_cond_AllowALNV_Normal}, nil},
	// CCMN <Wn>, <Wm>, #<nzcv>, <cond>

			i--
			continue // R18 is not used, skip
		}
		reg := fmt.Sprintf("(R%d, R%d)", i, i+1)
		l.add2("STP", "LDP", reg, 16)
	}
	// Add flag registers.
	l.addSpecial(
		"MOVD NZCV, R0\nMOVD R0, %d(RSP)",
		"MOVD %d(RSP), R0\nMOVD R0, NZCV",
		8)
	l.addSpecial(
		"MOVD FPSR, R0\nMOVD R0, %d(RSP)",
		"MOVD %d(RSP), R0\nMOVD R0, FPSR",
		8)
	// TODO: FPCR? I don't think we'll change it, so no need to save.

{"Name":"CCMN (immediate)","Bits":"1|0|1|1|1|0|1|0|0|1|0|imm5:5|cond:4|1|0|Rn:5|0|nzcv:4","Arch":"64-bit variant","Syntax":"CCMN <Xn>, #<imm>, #<nzcv>, <cond>","Code":"","Alias":""},

	{"MPIDR_EL1", REG_MPIDR_EL1, 0x1800a0, SR_READ},
	{"MVFR0_EL1", REG_MVFR0_EL1, 0x180300, SR_READ},
	{"MVFR1_EL1", REG_MVFR1_EL1, 0x180320, SR_READ},
	{"MVFR2_EL1", REG_MVFR2_EL1, 0x180340, SR_READ},
	{"NZCV", REG_NZCV, 0x1b4200, SR_READ | SR_WRITE},
	{"OSDLR_EL1", REG_OSDLR_EL1, 0x101380, SR_READ | SR_WRITE},
	{"OSDTRRX_EL1", REG_OSDTRRX_EL1, 0x100040, SR_READ | SR_WRITE},

		cond := SpecialOperand(p.From.Offset)
		if cond < SPOP_EQ || cond > SPOP_NV {
			c.ctxt.Diag("invalid condition\n%v", p)
		} else {
			cond -= SPOP_EQ
		}

		nzcv := int(p.To.Offset)
		if nzcv&^0xF != 0 {
			c.ctxt.Diag("implausible condition\n%v", p)
		}
		rf := int(p.Reg)
		if p.GetFrom3() == nil || p.GetFrom3().Reg < REG_F0 || p.GetFrom3().Reg > REG_F31 {

		crm_op2 := (x >> 5) & (1<<7 - 1)
		return Imm_hint(crm_op2)

	case arg_immediate_0_15_CRm:
		crm := (x >> 8) & (1<<4 - 1)
		return Imm{crm, false}

	case arg_immediate_0_15_nzcv:
		nzcv := x & (1<<4 - 1)
		return Imm{nzcv, false}

	case arg_immediate_0_31_imm5:
		imm5 := (x >> 16) & (1<<5 - 1)
		return Imm{imm5, false}

	case arg_immediate_0_31_immr:
		immr := (x >> 16) & (1<<6 - 1)
		if immr > 31 {