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Results 1 - 3 of 3 for MPIDR_EL1 (0.11 sec)

  1. src/cmd/internal/obj/arm64/sysRegEnc.go

    	{"MPAM0_EL1", REG_MPAM0_EL1, 0x18a520, SR_READ | SR_WRITE},
    	{"MPAM1_EL1", REG_MPAM1_EL1, 0x18a500, SR_READ | SR_WRITE},
    	{"MPAMIDR_EL1", REG_MPAMIDR_EL1, 0x18a480, SR_READ},
    	{"MPIDR_EL1", REG_MPIDR_EL1, 0x1800a0, SR_READ},
    	{"MVFR0_EL1", REG_MVFR0_EL1, 0x180300, SR_READ},
    	{"MVFR1_EL1", REG_MVFR1_EL1, 0x180320, SR_READ},
    	{"MVFR2_EL1", REG_MVFR2_EL1, 0x180340, SR_READ},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Oct 08 16:20:53 UTC 2019
    - 35.4K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64error.s

    	MSR	R6, MIDR_EL1                                     // ERROR "system register is not writable"
    	MSR	R6, MPAMIDR_EL1                                  // ERROR "system register is not writable"
    	MSR	R6, MPIDR_EL1                                    // ERROR "system register is not writable"
    	MSR	R6, MVFR0_EL1                                    // ERROR "system register is not writable"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64.s

    	MRS	MDRAR_EL1, R12                     // 0c1030d5
    	MRS	MDSCR_EL1, R15                     // 4f0230d5
    	MSR	R15, MDSCR_EL1                     // 4f0210d5
    	MRS	MIDR_EL1, R26                      // 1a0038d5
    	MRS	MPIDR_EL1, R25                     // b90038d5
    	MRS	MVFR0_EL1, R29                     // 1d0338d5
    	MRS	MVFR1_EL1, R7                      // 270338d5
    	MRS	MVFR2_EL1, R19                     // 530338d5
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 94.9K bytes
    - Viewed (0)
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