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Results 1 - 7 of 7 for ubfiz10 (0.46 sec)
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test/codegen/bitfield.go
} func ubfiz8(x uint8) uint64 { return uint64(x << 7) // arm64:"UBFIZ\t[$]7, R[0-9]+, [$]1", } // merge ANDconst into ubfiz. func ubfiz9(x uint64) uint64 { // arm64:"UBFIZ\t[$]3, R[0-9]+, [$]12",-"LSL",-"AND" // s390x:"RISBGZ\t[$]49, [$]60, [$]3,",-"SLD",-"AND" return (x & 0xfff) << 3 } func ubfiz10(x uint64) uint64 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 23 06:11:32 UTC 2022 - 9.6K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 18 01:40:37 UTC 2023 - 5.4K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/doc.go
FNMSUBS F7, F25, F7, F22 <=> fnmsub s22, s7, s7, s25 (4) BFI, BFXIL, SBFIZ, SBFX, UBFIZ, UBFX $<lsb>, <Rn>, $<width>, <Rd> Examples: BFIW $16, R20, $6, R0 <=> bfi w0, w20, #16, #6 UBFIZ $34, R26, $5, R20 <=> ubfiz x20, x26, #34, #5 (5) FCCMPD, FCCMPS, FCCMPED, FCCMPES <cond>, Fm. Fn, $<nzcv> Examples:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 07 00:21:42 UTC 2023 - 9.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64.rules
// ubfiz // (x << lc) >> rc (SRLconst [rc] (SLLconst [lc] x)) && lc > rc => (UBFIZ [armBFAuxInt(lc-rc, 64-lc)] x) // uint64(x) << lc (SLLconst [lc] (MOVWUreg x)) => (UBFIZ [armBFAuxInt(lc, min(32, 64-lc))] x) (SLLconst [lc] (MOVHUreg x)) => (UBFIZ [armBFAuxInt(lc, min(16, 64-lc))] x) (SLLconst [lc] (MOVBUreg x)) => (UBFIZ [armBFAuxInt(lc, min(8, 64-lc))] x) // uint64(x << lc)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/plan9x.go
if rno <= uint16(WZR) { op += "W" } } args[1], args[2] = args[2], args[1] case STLXRB, STLXRH, STXRB, STXRH: args[1], args[2] = args[2], args[1] case BFI, BFXIL, SBFIZ, SBFX, UBFIZ, UBFX: if r, ok := inst.Args[0].(Reg); ok { rno := uint16(r) if rno <= uint16(WZR) { op += "W" } } args[1], args[2], args[3] = args[3], args[1], args[2] case LDAXP, LDXP:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 16 22:24:28 UTC 2022 - 17K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
// match: (SLLconst [sc] (UBFIZ [bfc] x)) // cond: sc+bfc.getARM64BFwidth()+bfc.getARM64BFlsb() < 64 // result: (UBFIZ [armBFAuxInt(bfc.getARM64BFlsb()+sc, bfc.getARM64BFwidth())] x) for { sc := auxIntToInt64(v.AuxInt) if v_0.Op != OpARM64UBFIZ { break } bfc := auxIntToArm64BitField(v_0.AuxInt) x := v_0.Args[0] if !(sc+bfc.getARM64BFwidth()+bfc.getARM64BFlsb() < 64) { break }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, outputs: []outputInfo{ {0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30 }, }, }, { name: "UBFIZ", auxType: auxARM64BitField, argLen: 1, asm: arm64.AUBFIZ, reg: regInfo{ inputs: []inputInfo{
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)