VSSE8V		V3, V1, V0, (X10)		// ERROR "expected integer register in rs2 position"
	VLUXEI8V	(X10), V2, X11			// ERROR "expected vector register in vd position"
	VLUXEI8V	(X10), V2, X11			// ERROR "expected vector register in vd position"
	VLUXEI8V	(V1), V2, V3			// ERROR "expected integer register in rs1 position"
	VLUXEI8V	(X10), X11, V0, V3		// ERROR "expected vector register in vs2 position"

        getMockRequest().addHeader("user-agent",
                "Mozilla/5.0 (X11; Linux x86_64) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/28.0.1500.52 Safari/537.36");
        assertEquals(UserAgentType.CHROME, userAgentHelper.getUserAgentType());
    }

    public void test_getUserAgentType_FireFox() {
        getMockRequest().addHeader("user-agent", "Mozilla/5.0 (X11; Ubuntu; Linux x86_64; rv:42.0) Gecko/20100101 Firefox/42.0");

	SHA1MSG1 (R11), X11      // 450f38c91b
	SHA1MSG1 X2, X11         // 440f38c9da
	SHA1MSG1 X11, X11        // 450f38c9db
	SHA1MSG2 (BX), X2        // 0f38ca13
	SHA1MSG2 (R11), X2       // 410f38ca13
	SHA1MSG2 X2, X2          // 0f38cad2
	SHA1MSG2 X11, X2         // 410f38cad3
	SHA1MSG2 (BX), X11       // 440f38ca1b
	SHA1MSG2 (R11), X11      // 450f38ca1b
	SHA1MSG2 X2, X11         // 440f38cada
	SHA1MSG2 X11, X11        // 450f38cadb

	// 31.7.5: Vector Strided Instructions
	VLSE8V		(X10), X11, V3			// 8701b50a
	VLSE8V		(X10), X11, V0, V3		// 8701b508
	VLSE16V		(X10), X11, V3			// 8751b50a
	VLSE16V		(X10), X11, V0, V3		// 8751b508
	VLSE32V		(X10), X11, V3			// 8761b50a
	VLSE32V		(X10), X11, V0, V3		// 8761b508
	VLSE64V		(X10), X11, V3			// 8771b50a
	VLSE64V		(X10), X11, V0, V3		// 8771b508
	VSSE8V		V3, X11, (X10)			// a701b50a
	VSSE8V		V3, X11, V0, (X10)		// a701b508

AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 176(AX), X11 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 192(AX), X11 JE encLast1 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 208(AX), X11 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 224(AX), X11 encLast1: AESENCLAST...

	EXTRACTPS $-1, X2, (BX)         // ERROR "invalid instruction"
	// VSIB addressing does not permit non-vector (X/Y)
	// scaled index register.
	VPGATHERDQ X12,(R13)(AX*2), X11 // ERROR "invalid instruction"
	VPGATHERDQ X2, 664(BX*1), X1    // ERROR "invalid instruction"
	VPGATHERDQ Y2, (BP)(AX*2), Y1   // ERROR "invalid instruction"
	VPGATHERDQ Y5, 664(DX*8), Y6    // ERROR "invalid instruction"

	MOVWU	X5, (X6)			// ERROR "unsupported unsigned store"
	MOVF	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOVD	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOV	X10, X11, X12			// ERROR "illegal MOV instruction"
	MOVW	X10, X11, X12			// ERROR "illegal MOV instruction"
	RORI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
	SLLI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"

    X0,
    X1,
    X2
  }

  private enum MediumEnum {
    X0,
    X1,
    X2,
    X3,
    X4,
    X5,
    X6,
    X7,
    X8,
    X9,
    X10,
    X11,
    X12,
    X13,
    X14,
    X15,
    X16,
    X17,
    X18,
    X19,
    X20,
    X21,
    X22,
    X23,
    X24,
    X25,
    X26,
    X27,
    X28,

	{"R13", "R13"},
	{"R14", "R14"},
	{"R15", "R15"},
	{"R8", "R8"},
	{"R9", "R9"},
	{"g", "R14"},
	{"SI", "SI"},
	{"SP", "SP"},
	{"X0", "X0"},
	{"X1", "X1"},
	{"X10", "X10"},
	{"X11", "X11"},
	{"X12", "X12"},
	{"X13", "X13"},
	{"X14", "X14"},
	{"X15", "X15"},
	{"X2", "X2"},
	{"X3", "X3"},
	{"X4", "X4"},
	{"X5", "X5"},
	{"X6", "X6"},
	{"X7", "X7"},
	{"X8", "X8"},

		"PK\x01\x02\x14\x00\x14\x00\b\b\b\x004\x9d3?\xbfP\x96b\x86\x04\x00\x00\xb2\x06\x00\x00\x11\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xa9J\x02\x00META-INF/CERT.RSA",
	}
	for i, s := range dirEnts {
		var f File
		err := readDirectoryHeader(&f, strings.NewReader(s))
		if err != nil {