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  1. src/cmd/asm/internal/asm/testdata/riscv64validation.s

    	CSW	X11, -1(X10)				// ERROR "must be in range [0, 127]"
    	CSW	X11, 22(X10)				// ERROR "must be a multiple of 4"
    	CSW	X11, 128(X10)				// ERROR "must be in range [0, 127]"
    	CSD	F11, 24(X10)				// ERROR "expected integer prime register in rs2 position"
    	CSD	X11, -1(X10)				// ERROR "must be in range [0, 255]"
    	CSD	X11, 28(X10)				// ERROR "must be a multiple of 8"
    	CSD	X11, 256(X10)				// ERROR "must be in range [0, 255]"
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Nov 13 12:17:37 GMT 2025
    - 42.1K bytes
    - Click Count (0)
  2. src/test/java/org/codelibs/fess/helper/UserAgentHelperTest.java

            getMockRequest().addHeader("user-agent",
                    "Mozilla/5.0 (X11; Linux x86_64) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/28.0.1500.52 Safari/537.36");
            assertEquals(UserAgentType.CHROME, userAgentHelper.getUserAgentType());
        }
    
        @Test
        public void test_getUserAgentType_FireFox() {
            getMockRequest().addHeader("user-agent", "Mozilla/5.0 (X11; Ubuntu; Linux x86_64; rv:42.0) Gecko/20100101 Firefox/42.0");
    Created: Tue Mar 31 13:07:34 GMT 2026
    - Last Modified: Wed Jan 14 14:29:07 GMT 2026
    - 7.5K bytes
    - Click Count (0)
  3. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	ADDSUBPD X11, X2                        // 66410fd0d3
    	ADDSUBPD (BX), X11                      // 66440fd01b
    	ADDSUBPD (R11), X11                     // 66450fd01b
    	ADDSUBPD X2, X11                        // 66440fd0da
    	ADDSUBPD X11, X11                       // 66450fd0db
    	ADDSUBPS (BX), X2                       // f20fd013
    	ADDSUBPS (R11), X2                      // f2410fd013
    	ADDSUBPS X2, X2                         // f20fd0d2
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Fri Oct 08 21:38:44 GMT 2021
    - 581.9K bytes
    - Click Count (1)
  4. lib/fips140/v1.26.0.zip

    AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 176(AX), X11 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 192(AX), X11 JE encLast1 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 208(AX), X11 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 224(AX), X11 encLast1: AESENCLAST...
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Jan 08 17:58:32 GMT 2026
    - 660.3K bytes
    - Click Count (0)
  5. src/cmd/asm/internal/asm/testdata/riscv64.s

    	VLSSEG7E16V	(X10), X11, V8			// 0754b5ca
    	VLSSEG7E32V	(X10), X11, V8			// 0764b5ca
    	VLSSEG7E64V	(X10), X11, V8			// 0774b5ca
    	VLSSEG7E8V	(X10), X11, V0, V8		// 0704b5c8
    	VLSSEG7E16V	(X10), X11, V0, V8		// 0754b5c8
    	VLSSEG7E32V	(X10), X11, V0, V8		// 0764b5c8
    	VLSSEG7E64V	(X10), X11, V0, V8		// 0774b5c8
    
    	VLSSEG8E8V	(X10), X11, V8			// 0704b5ea
    	VLSSEG8E16V	(X10), X11, V8			// 0754b5ea
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Sat Apr 04 05:25:40 GMT 2026
    - 74.2K bytes
    - Click Count (0)
  6. src/cmd/asm/internal/asm/testdata/amd64enc_extra.s

    	SHA1MSG1 (R11), X11      // 450f38c91b
    	SHA1MSG1 X2, X11         // 440f38c9da
    	SHA1MSG1 X11, X11        // 450f38c9db
    	SHA1MSG2 (BX), X2        // 0f38ca13
    	SHA1MSG2 (R11), X2       // 410f38ca13
    	SHA1MSG2 X2, X2          // 0f38cad2
    	SHA1MSG2 X11, X2         // 410f38cad3
    	SHA1MSG2 (BX), X11       // 440f38ca1b
    	SHA1MSG2 (R11), X11      // 450f38ca1b
    	SHA1MSG2 X2, X11         // 440f38cada
    	SHA1MSG2 X11, X11        // 450f38cadb
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Feb 20 11:20:03 GMT 2025
    - 57.7K bytes
    - Click Count (0)
  7. lib/fips140/v1.0.0-c2097c7c.zip

    AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 176(AX), X11 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 192(AX), X11 JE encLast1 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 208(AX), X11 AESENC X11, X0 AESENC X11, X1 AESENC X11, X2 AESENC X11, X3 AESENC X11, X4 AESENC X11, X5 AESENC X11, X6 AESENC X11, X7 MOVOU 224(AX), X11 encLast1: AESENCLAST...
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Sep 25 19:53:19 GMT 2025
    - 642.7K bytes
    - Click Count (0)
  8. src/cmd/asm/internal/asm/testdata/riscv64error.s

    	MOVWU	X5, (X6)			// ERROR "unsupported unsigned store"
    	MOVF	F0, F1, F2			// ERROR "illegal MOV instruction"
    	MOVD	F0, F1, F2			// ERROR "illegal MOV instruction"
    	MOV	X10, X11, X12			// ERROR "illegal MOV instruction"
    	MOVW	X10, X11, X12			// ERROR "illegal MOV instruction"
    	RORI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
    	SLLI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Wed Apr 01 04:17:57 GMT 2026
    - 27.2K bytes
    - Click Count (0)
  9. src/cmd/asm/internal/asm/testdata/amd64error.s

    	EXTRACTPS $-1, X2, (BX)         // ERROR "invalid instruction"
    	// VSIB addressing does not permit non-vector (X/Y)
    	// scaled index register.
    	VPGATHERDQ X12,(R13)(AX*2), X11 // ERROR "invalid instruction"
    	VPGATHERDQ X2, 664(BX*1), X1    // ERROR "invalid instruction"
    	VPGATHERDQ Y2, (BP)(AX*2), Y1   // ERROR "invalid instruction"
    	VPGATHERDQ Y5, 664(DX*8), Y6    // ERROR "invalid instruction"
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Wed Jun 14 00:03:57 GMT 2023
    - 8.9K bytes
    - Click Count (0)
  10. src/cmd/asm/internal/asm/operand_test.go

    	{"R13", "R13"},
    	{"R14", "R14"},
    	{"R15", "R15"},
    	{"R8", "R8"},
    	{"R9", "R9"},
    	{"g", "R14"},
    	{"SI", "SI"},
    	{"SP", "SP"},
    	{"X0", "X0"},
    	{"X1", "X1"},
    	{"X10", "X10"},
    	{"X11", "X11"},
    	{"X12", "X12"},
    	{"X13", "X13"},
    	{"X14", "X14"},
    	{"X15", "X15"},
    	{"X2", "X2"},
    	{"X3", "X3"},
    	{"X4", "X4"},
    	{"X5", "X5"},
    	{"X6", "X6"},
    	{"X7", "X7"},
    	{"X8", "X8"},
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Aug 29 18:31:05 GMT 2023
    - 23.9K bytes
    - Click Count (0)
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