VPGATHERQQ Y2, (BP)(X7*2), Y2   // ERROR "mask, index, and destination registers should be distinct"
	VPGATHERQQ Y7, (BP)(X2*2), Y2   // ERROR "mask, index, and destination registers should be distinct"
	VPGATHERDQ X2, 664(X2*8), X2    // ERROR "mask, index, and destination registers should be distinct"
	VPGATHERDQ X2, 664(X2*8), X7    // ERROR "mask, index, and destination registers should be distinct"

#include "../../../../../../runtime/textflag.h"

TEXT asmtest_vpclmulqdq_avx512f(SB), NOSPLIT, $0
	VPCLMULQDQ $127, X22, X21, X15                     // 6233550044fe7f or 6233d50044fe7f
	VPCLMULQDQ $127, X7, X21, X15                      // 6273550044ff7f or 6273d50044ff7f
	VPCLMULQDQ $127, X19, X21, X15                     // 6233550044fb7f or 6233d50044fb7f

	AMOSWAPW	X5, (X6), X7			// af23530e
	AMOSWAPD	X5, (X6), X7			// af33530e
	AMOADDW		X5, (X6), X7			// af235306
	AMOADDD		X5, (X6), X7			// af335306
	AMOANDW		X5, (X6), X7			// af235366
	AMOANDD		X5, (X6), X7			// af335366
	AMOORW		X5, (X6), X7			// af235346
	AMOORD		X5, (X6), X7			// af335346
	AMOXORW		X5, (X6), X7			// af235326
	AMOXORD		X5, (X6), X7			// af335326
	AMOMAXW		X5, (X6), X7			// af2353a6

	VPGATHERDQ Y0, 0(X14*8), Y6             // c4a2fd9034f500000000
	VPGATHERDQ Y0, 664(X14*8), Y6           // c4a2fd9034f598020000
	VPGATHERDQ X2, (BP)(X7*2), X1           // c4e2e9904c7d00
	VPGATHERDQ Y2, (BP)(X7*2), Y1           // c4e2ed904c7d00
	VPGATHERDQ X12, (R13)(X14*2), X11       // c40299905c7500
	VPGATHERDQ Y12, (R13)(X14*2), Y11       // c4029d905c7500

X1 PXOR X11, X2 PXOR X12, X3 PXOR X13, X4 PXOR X14, X5 // Similarly if zero == 0 PCMPEQL X9, X9 MOVOU X7, X15 PANDN X9, X15 MOVOU 96(SP), X9 MOVOU 112(SP), X10 MOVOU 128(SP), X11 MOVOU 144(SP), X12 MOVOU p256one<>+0(SB), X13 MOVOU p256one<>+16(SB), X14 PAND X15, X0 PAND X15, X1 PAND X15, X2 PAND X15, X3 PAND X15, X4 PAND X15, X5 PAND X7, X9 PAND X7, X10 PAND X7, X11 PAND X7, X12 PAND X7, X13 PAND X7, X14 PXOR X9, X0 PXOR X10, X1 PXOR X11, X2 PXOR X12, X3 PXOR X13, X4 PXOR X14, X5 // Finally output...

	{"X10", "X10"},
	{"X11", "X11"},
	{"X12", "X12"},
	{"X13", "X13"},
	{"X14", "X14"},
	{"X15", "X15"},
	{"X2", "X2"},
	{"X3", "X3"},
	{"X4", "X4"},
	{"X5", "X5"},
	{"X6", "X6"},
	{"X7", "X7"},
	{"X8", "X8"},
	{"X9", "X9"},
	{"_expand_key_128<>(SB)", "_expand_key_128<>(SB)"},
	{"_seek<>(SB)", "_seek<>(SB)"},
	{"a2+16(FP)", "a2+16(FP)"},
	{"addr2+24(FP)", "addr2+24(FP)"},

X1 PXOR X11, X2 PXOR X12, X3 PXOR X13, X4 PXOR X14, X5 // Similarly if zero == 0 PCMPEQL X9, X9 MOVOU X7, X15 PANDN X9, X15 MOVOU 96(SP), X9 MOVOU 112(SP), X10 MOVOU 128(SP), X11 MOVOU 144(SP), X12 MOVOU p256one<>+0(SB), X13 MOVOU p256one<>+16(SB), X14 PAND X15, X0 PAND X15, X1 PAND X15, X2 PAND X15, X3 PAND X15, X4 PAND X15, X5 PAND X7, X9 PAND X7, X10 PAND X7, X11 PAND X7, X12 PAND X7, X13 PAND X7, X14 PXOR X9, X0 PXOR X10, X1 PXOR X11, X2 PXOR X12, X3 PXOR X13, X4 PXOR X14, X5 // Finally output...

	CMV	X0, X5					// ERROR "cannot use register X0 in rs2"
	CMV	X5, X6, X7				// ERROR "expected no register in rs1"
	CMV	X5, X0					// ERROR "cannot use register X0 in rd"
	CMV	F1, X5					// ERROR "expected integer register in rs2"
	CMV	X5, F1					// ERROR "expected integer register in rd"
	CADD	X5, X6, X7				// ERROR "rd must be the same as rs1"
	CADD	X0, X8					// ERROR "cannot use register X0 in rs2"

    }
    return retVal;
  }

  private enum SmallEnum {
    X0,
    X1,
    X2
  }

  private enum MediumEnum {
    X0,
    X1,
    X2,
    X3,
    X4,
    X5,
    X6,
    X7,
    X8,
    X9,
    X10,
    X11,
    X12,
    X13,
    X14,
    X15,
    X16,
    X17,
    X18,
    X19,
    X20,
    X21,
    X22,
    X23,
    X24,

    }
    return retVal;
  }

  private enum SmallEnum {
    X0,
    X1,
    X2
  }

  private enum MediumEnum {
    X0,
    X1,
    X2,
    X3,
    X4,
    X5,
    X6,
    X7,
    X8,
    X9,
    X10,
    X11,
    X12,
    X13,
    X14,
    X15,
    X16,
    X17,
    X18,
    X19,
    X20,
    X21,
    X22,
    X23,
    X24,