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Results 61 - 70 of 70 for r25 (0.03 sec)
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src/cmd/internal/notsha256/sha256block_ppc64x.s
#define R_x050 R15 #define R_x060 R16 #define R_x070 R17 #define R_x080 R18 #define R_x090 R19 #define R_x0a0 R20 #define R_x0b0 R21 #define R_x0c0 R22 #define R_x0d0 R23 #define R_x0e0 R24 #define R_x0f0 R25 #define R_x100 R26 #define R_x110 R27 // V0-V7 are A-H // V8-V23 are used for the message schedule #define KI V24 #define FUNC V25 #define S0 V26 #define S1 V27 #define s0 V28 #define s1 V29
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:27 UTC 2023 - 14.5K bytes - Viewed (0) -
src/crypto/sha512/sha512block_ppc64x.s
#define INP R4 #define END R5 #define TBL R6 #define CNT R8 #define LEN R9 #define TEMP R12 #define TBL_STRT R7 // Pointer to start of kcon table. #define R_x000 R0 #define R_x010 R10 #define R_x020 R25 #define R_x030 R26 #define R_x040 R14 #define R_x050 R15 #define R_x060 R16 #define R_x070 R17 #define R_x080 R18 #define R_x090 R19 #define R_x0a0 R20 #define R_x0b0 R21 #define R_x0c0 R22
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 15.8K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/a.out.go
// REG_{name} = SYSREG_END + iota. const ( REG_SPECIAL = obj.RBaseARM64 + 1<<12 ) // Register assignments: // // compiler allocates R0 up as temps // compiler allocates register variables R7-R25 // compiler allocates external registers R26 down // // compiler allocates register variables F7-F26 // compiler allocates external registers F26 down const (
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Oct 18 17:56:30 UTC 2023 - 18.1K bytes - Viewed (0) -
src/crypto/sha256/sha256block_ppc64x.s
#define R_x050 R15 #define R_x060 R16 #define R_x070 R17 #define R_x080 R18 #define R_x090 R19 #define R_x0a0 R20 #define R_x0b0 R21 #define R_x0c0 R22 #define R_x0d0 R23 #define R_x0e0 R24 #define R_x0f0 R25 #define R_x100 R26 #define R_x110 R27 // V0-V7 are A-H // V8-V23 are used for the message schedule #define KI V24 #define FUNC V25 #define S0 V26 #define S1 V27 #define s0 V28 #define s1 V29
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 14.4K bytes - Viewed (0) -
src/runtime/mkpreempt.go
if _64bit { mov = "MOVV" movf = "MOVD" add = "ADDV" sub = "SUBV" r28 = "RSB" regsize = 8 softfloat = "GOMIPS64_softfloat" } // Add integer registers R1-R22, R24-R25, R28 // R0 (zero), R23 (REGTMP), R29 (SP), R30 (g), R31 (LR) are special, // and not saved here. R26 and R27 are reserved by kernel and not used.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 15.3K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/obj9.go
// // MOVD g_panic(g), R22 // CMP R22, $0 // BEQ end // MOVD panic_argp(R22), R23 // ADD $(autosize+8), R1, R24 // CMP R23, R24 // BNE end // ADD $8, R1, R25 // MOVD R25, panic_argp(R22) // end: // NOP // // The NOP is needed to give the jumps somewhere to land. // It is a liblink NOP, not a ppc64 NOP: it encodes to 0 instruction bytes.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 40.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
"R8", "R9", "R10", "R11", // REGCTXT for closures "R12", "R13", // REGTLS "R14", "R15", "R16", "R17", "R18", "R19", "R20", "R21", "R22", "R23", "R24", "R25", "R26", "R27", "R28", "R29", "g", // REGG. Using name "g" and setting Config.hasGReg makes it "just happen". "R31", // REGTMP "F0", "F1", "F2", "F3", "F4", "F5", "F6",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_arm64.s
#define t3 R14 #define const0 R15 #define const1 R16 #define hlp0 R17 #define hlp1 res_ptr #define x0 R19 #define x1 R20 #define x2 R21 #define x3 R22 #define y0 R23 #define y1 R24 #define y2 R25 #define y3 R26 #define const2 t2 #define const3 t3 DATA p256const0<>+0x00(SB)/8, $0x00000000ffffffff DATA p256const1<>+0x00(SB)/8, $0xffffffff00000001 DATA p256ordK0<>+0x00(SB)/8, $0xccd1c8aaee00bc4f
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 29.7K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_ppc64le.s
MOVD $16, R16 MOVD $32, R17 MOVD $48, R18 MOVD $64, R19 MOVD $80, R20 MOVD $96, R21 MOVD $112, R22 MOVD $128, R23 MOVD $144, R24 MOVD $160, R25 MOVD $104, R26 // offset of sign+24(FP) LXVD2X (R16)(CPOOL), PH LXVD2X (R0)(CPOOL), PL LXVD2X (R17)(P2ptr), Y2L LXVD2X (R18)(P2ptr), Y2H XXPERMDI Y2H, Y2H, $2, Y2H
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 56.5K bytes - Viewed (0) -
RELEASE.md
* `TfLiteSignatureRunnerResizeInputTensor` * New C API function `TfLiteExtensionApisVersion` added to `tensorflow/lite/c/c_api.h`. * Add int8 and int16x8 support for RSQRT operator * Android NDK r25 is supported. ### Bug Fixes and Other Changes * Add TensorFlow Quantizer to TensorFlow pip package.
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Tue Jun 11 23:24:08 UTC 2024 - 730.3K bytes - Viewed (0)