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Results 1 - 10 of 22 for LXVD2X (0.09 sec)
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src/internal/bytealg/compare_ppc64x.s
LXVD2X (R5)(R9),V3 LXVD2X (R6)(R9),V4 VCMPEQUDCC V3,V4,V1 BGE CR6,different RET PCALIGN $16 cmp32: // 32 - 63B ANDCC $31,R9,R9 LXVD2X (R0)(R5),V3 LXVD2X (R0)(R6),V4 VCMPEQUDCC V3,V4,V1 BGE CR6,different LXVD2X (R10)(R5),V3 LXVD2X (R10)(R6),V4 VCMPEQUDCC V3,V4,V1 BGE CR6,different BC $12,2,LR // beqlr ADD R9,R10,R10 LXVD2X (R9)(R5),V3
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 28 17:33:20 UTC 2023 - 6.7K bytes - Viewed (0) -
src/internal/bytealg/equal_ppc64x.s
ANDCC $0x3F, R5, R5 // len%64==0? PCALIGN $16 loop64: LXVD2X (R8+R0), V0 LXVD2X (R4+R0), V1 VCMPEQUBCC V0, V1, V2 // compare, setting CR6 BGELR_CR6 LXVD2X (R8+R14), V0 LXVD2X (R4+R14), V1 VCMPEQUBCC V0, V1, V2 BGELR_CR6 LXVD2X (R8+R15), V0 LXVD2X (R4+R15), V1 VCMPEQUBCC V0, V1, V2 BGELR_CR6 LXVD2X (R8+R16), V0 LXVD2X (R4+R16), V1 VCMPEQUBCC V0, V1, V2 BGELR_CR6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 4.9K bytes - Viewed (0) -
src/crypto/subtle/xor_ppc64x.s
// Load 4 vectors of a and b // XOR the corresponding vectors // from a and b and store the result loop64: LXVD2X (R4)(R8), VS32 LXVD2X (R4)(R10), VS34 LXVD2X (R4)(R14), VS36 LXVD2X (R4)(R15), VS38 LXVD2X (R5)(R8), VS33 LXVD2X (R5)(R10), VS35 LXVD2X (R5)(R14), VS37 LXVD2X (R5)(R15), VS39 XXLXOR VS32, VS33, VS32 XXLXOR VS34, VS35, VS34 XXLXOR VS36, VS37, VS36 XXLXOR VS38, VS39, VS38
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 2.9K bytes - Viewed (0) -
test/codegen/copy.go
func moveDisjointStack32() { var s [32]byte // ppc64x:-".*memmove" // ppc64x/power8:"LXVD2X",-"ADD",-"BC" // ppc64x/power9:"LXV",-"LXVD2X",-"ADD",-"BC" copy(s[:], x[:32]) runtime.KeepAlive(&s) } func moveDisjointStack64() { var s [96]byte // ppc64x:-".*memmove" // ppc64x/power8:"LXVD2X","ADD","BC" // ppc64x/power9:"LXV",-"LXVD2X",-"ADD",-"BC" copy(s[:], x[:96]) runtime.KeepAlive(&s) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Sep 22 14:09:29 UTC 2023 - 3.1K bytes - Viewed (0) -
src/crypto/aes/asm_ppc64x.s
MOVD $128, R20 \ MOVD $144, R21 \ LXVD2X (R0+Rkeyp), V6 \ ADD $16, Rkeyp \ BEQ CR1, L_start10 \ BEQ CR2, L_start12 \ LXVD2X (R0+Rkeyp), V7 \ LXVD2X (R12+Rkeyp), V8 \ ADD $32, Rkeyp \ L_start12: \ LXVD2X (R0+Rkeyp), V9 \ LXVD2X (R12+Rkeyp), V10 \ ADD $32, Rkeyp \ L_start10: \ LXVD2X (R0+Rkeyp), V11 \ LXVD2X (R12+Rkeyp), V12 \ LXVD2X (R14+Rkeyp), V13 \ LXVD2X (R15+Rkeyp), V14 \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 18:05:32 UTC 2024 - 18.6K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_ppc64le.s
VCMPEQUD SEL, ZER, SEL LXVD2X (P1ptr+R0), X1H LXVD2X (P1ptr+R16), X1L LXVD2X (P1ptr+R17), Y1H LXVD2X (P1ptr+R18), Y1L LXVD2X (P1ptr+R19), Z1H LXVD2X (P1ptr+R20), Z1L LXVD2X (P2ptr+R0), X2H LXVD2X (P2ptr+R16), X2L LXVD2X (P2ptr+R17), Y2H LXVD2X (P2ptr+R18), Y2L LXVD2X (P2ptr+R19), Z2H LXVD2X (P2ptr+R20), Z2L VSEL X1H, X2H, SEL, X1H
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 56.5K bytes - Viewed (0) -
src/crypto/aes/gcm_ppc64x.s
MOVD $48, R18; \ MOVD $64, R19; \ LXVD2X (blk_key)(R0), VS0; \ LXVD2X (blk_key)(R16), VS1; \ LXVD2X (blk_key)(R17), VS2; \ LXVD2X (blk_key)(R18), VS3; \ LXVD2X (blk_key)(R19), VS4; \ ADD $64, R16; \ ADD $64, R17; \ ADD $64, R18; \ ADD $64, R19; \ LXVD2X (blk_key)(R16), VS5; \ LXVD2X (blk_key)(R17), VS6; \ LXVD2X (blk_key)(R18), VS7; \ LXVD2X (blk_key)(R19), VS8; \ ADD $64, R16; \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 27.1K bytes - Viewed (0) -
src/runtime/memmove_ppc64x.s
DCBTST (TGT) // prepare data cache DCBT (SRC) MOVD OCTWORDS, CTR // Number of 64 byte chunks MOVD $32, IDX32 MOVD $48, IDX48 PCALIGN $16 forward64: LXVD2X (R0)(SRC), VS32 // load 64 bytes LXVD2X (IDX16)(SRC), VS33 LXVD2X (IDX32)(SRC), VS34 LXVD2X (IDX48)(SRC), VS35 ADD $64, SRC STXVD2X VS32, (R0)(TGT) // store 64 bytes STXVD2X VS33, (IDX16)(TGT) STXVD2X VS34, (IDX32)(TGT) STXVD2X VS35, (IDX48)(TGT)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 4.9K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_ppc64x.s
PCALIGN $16 loop64: LXVD2X (R0)(R8),V2 // Scan 64 bytes at a time, starting at &s[0] VCMPEQUBCC V2,V1,V6 BNE CR6,foundat0 // Match found at R8, jump out LXVD2X (R11)(R8),V2 VCMPEQUBCC V2,V1,V6 BNE CR6,foundat1 // Match found at R8+16 bytes, jump out LXVD2X (R12)(R8),V2 VCMPEQUBCC V2,V1,V6 BNE CR6,foundat2 // Match found at R8+32 bytes, jump out LXVD2X (R6)(R8),V2 VCMPEQUBCC V2,V1,V6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:10:29 UTC 2023 - 6.3K bytes - Viewed (0) -
src/crypto/sha512/sha512block_ppc64x.s
MOVWZ $8, TEMP LVSL (TEMP)(R0), LEMASK VSPLTISB $0x0F, KI VXOR KI, LEMASK, LEMASK #endif LXVD2X (CTX)(R_x000), VS32 // v0 = vs32 LXVD2X (CTX)(R_x010), VS34 // v2 = vs34 LXVD2X (CTX)(R_x020), VS36 // v4 = vs36 // unpack the input values into vector registers VSLDOI $8, V0, V0, V1 LXVD2X (CTX)(R_x030), VS38 // v6 = vs38 VSLDOI $8, V2, V2, V3 VSLDOI $8, V4, V4, V5 VSLDOI $8, V6, V6, V7
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 15.8K bytes - Viewed (0)