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Results 11 - 20 of 64 for divlu (0.59 sec)

  1. src/cmd/compile/internal/ssa/_gen/MIPS64.rules

    (Div64u x y) => (Select1 (DIVVU x y))
    (Div32 x y) => (Select1 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
    (Div32u x y) => (Select1 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)))
    (Div16 x y) => (Select1 (DIVV (SignExt16to64 x) (SignExt16to64 y)))
    (Div16u x y) => (Select1 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)))
    (Div8 x y) => (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 03:59:48 UTC 2023
    - 41.9K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/LOONG64.rules

    (Div64 x y) => (DIVV x y)
    (Div64u ...) => (DIVVU ...)
    (Div32 x y) => (DIVV (SignExt32to64 x) (SignExt32to64 y))
    (Div32u x y) => (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y))
    (Div16 x y) => (DIVV (SignExt16to64 x) (SignExt16to64 y))
    (Div16u x y) => (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y))
    (Div8 x y) => (DIVV (SignExt8to64 x) (SignExt8to64 y))
    (Div8u x y) => (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y))
    (Div(32|64)F ...) => (DIV(F|D) ...)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:26:25 UTC 2023
    - 31.8K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/MIPS.rules

    (Mul32uhilo ...) => (MULTU ...)
    
    (Div32 x y) => (Select1 (DIV x y))
    (Div32u x y) => (Select1 (DIVU x y))
    (Div16 x y) => (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
    (Div16u x y) => (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
    (Div8 x y) => (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
    (Div8u x y) => (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
    (Div(32|64)F ...) => (DIV(F|D) ...)
    
    (Mod32 x y) => (Select0 (DIV x y))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 35.3K bytes
    - Viewed (0)
  4. test/codegen/arithmetic.go

    func Pow2DivisibleSigned(n1, n2 int) (bool, bool) {
    	// 386:"TESTL\t[$]63",-"DIVL",-"SHRL"
    	// amd64:"TESTQ\t[$]63",-"DIVQ",-"SHRQ"
    	// arm:"AND\t[$]63",-".*udiv",-"SRA"
    	// arm64:"TST\t[$]63",-"UDIV",-"ASR",-"AND"
    	// ppc64x:"ANDCC",-"RLDICL",-"SRAD",-"CMP"
    	a := n1%64 == 0 // signed divisible
    
    	// 386:"TESTL\t[$]63",-"DIVL",-"SHRL"
    	// amd64:"TESTQ\t[$]63",-"DIVQ",-"SHRQ"
    	// arm:"AND\t[$]63",-".*udiv",-"SRA"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 15:28:00 UTC 2024
    - 15.2K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/riscv/anames.go

    	"PAUSE",
    	"ADDIW",
    	"SLLIW",
    	"SRLIW",
    	"SRAIW",
    	"ADDW",
    	"SLLW",
    	"SRLW",
    	"SUBW",
    	"SRAW",
    	"LD",
    	"SD",
    	"MUL",
    	"MULH",
    	"MULHU",
    	"MULHSU",
    	"MULW",
    	"DIV",
    	"DIVU",
    	"REM",
    	"REMU",
    	"DIVW",
    	"DIVUW",
    	"REMW",
    	"REMUW",
    	"LRD",
    	"SCD",
    	"LRW",
    	"SCW",
    	"AMOSWAPD",
    	"AMOADDD",
    	"AMOANDD",
    	"AMOORD",
    	"AMOXORD",
    	"AMOMAXD",
    	"AMOMAXUD",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 2.9K bytes
    - Viewed (0)
  6. src/runtime/time_windows_386.s

    	SBBL $(delta >> 32), DX
    
    	// nano/100 = DX:AX
    	// split into two decimal halves by div 1e9.
    	// (decimal point is two spots over from correct place,
    	// but we avoid overflow in the high word.)
    	MOVL	$1000000000, CX
    	DIVL	CX
    	MOVL	AX, DI
    	MOVL	DX, SI
    
    	// DI = nano/100/1e9 = nano/1e11 = sec/100, DX = SI = nano/100%1e9
    	// split DX into seconds and nanoseconds by div 1e7 magic multiply.
    	MOVL	DX, AX
    	MOVL	$1801439851, CX
    	MULL	CX
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Sep 07 17:19:45 UTC 2023
    - 1.7K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/mips64.s

    	MULV	R19, R8		// 0113001c
    	MULVU	R21, R13	// 01b5001d
    
    //	LDIV rreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	DIV	R18, R22	// 02d2001a
    	DIVU	R14, R9		// 012e001b
    	DIVV	R8, R13		// 01a8001e
    	DIVVU	R16, R19	// 0270001f
    
    //	LREM rreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	REM	R18, R22	// 02d2001a
    	REMU	R14, R9		// 012e001b
    	REMV	R8, R13		// 01a8001e
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/PPC64.rules

    (Select1 (Mul64uhilo x y)) => (MULLD x y)
    
    (Div64 [false] x y) => (DIVD x y)
    (Div64u ...) => (DIVDU ...)
    (Div32 [false] x y) => (DIVW x y)
    (Div32u ...) => (DIVWU ...)
    (Div16 [false]  x y) => (DIVW  (SignExt16to32 x) (SignExt16to32 y))
    (Div16u x y) => (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
    (Div8 x y) => (DIVW  (SignExt8to32 x) (SignExt8to32 y))
    (Div8u x y) => (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y))
    
    (Hmul(64|64u|32|32u) ...) => (MULH(D|DU|W|WU) ...)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 53.2K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "DIVW", argLength: 2, reg: gp21, asm: "DIVW", typ: "Int32"},   // arg0/arg1 (signed 32-bit)
    		{name: "DIVDU", argLength: 2, reg: gp21, asm: "DIVDU", typ: "Int64"}, // arg0/arg1 (unsigned 64-bit)
    		{name: "DIVWU", argLength: 2, reg: gp21, asm: "DIVWU", typ: "Int32"}, // arg0/arg1 (unsigned 32-bit)
    
    		{name: "MODUD", argLength: 2, reg: gp21, asm: "MODUD", typ: "UInt64"}, // arg0 % arg1 (unsigned 64-bit)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  10. src/runtime/sys_windows_386.s

    	CLD
    
    	// determine index into runtime·cbs table
    	SUBL	$runtime·callbackasm(SB), AX
    	MOVL	$0, DX
    	MOVL	$5, BX	// divide by 5 because each call instruction in runtime·callbacks is 5 bytes long
    	DIVL	BX
    	SUBL	$1, AX	// subtract 1 because return PC is to the next slot
    
    	// Create a struct callbackArgs on our stack.
    	SUBL	$(12+callbackArgs__size), SP
    	MOVL	AX, (12+callbackArgs_index)(SP)		// callback index
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Sep 21 15:56:43 UTC 2023
    - 6.5K bytes
    - Viewed (0)
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