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Results 1 - 10 of 721 for vand (0.1 sec)
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src/internal/bytealg/index_ppc64x.s
VSLDOI $1, V1, V2, V3 // V3=(V1:V2)<<1 VSLDOI $2, V1, V2, V4 // V4=(V1:V2)<<2 VAND V1, SEPMASK, V8 // Mask out sep size 0th index VAND V3, SEPMASK, V9 // Mask out sep size 1st index VAND V4, SEPMASK, V11 // Mask out sep size 2nd index VAND V5, SEPMASK, V12 // Mask out sep size 3rd index #endif VCMPEQUBCC V0, V8, V8 // compare masked string
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 31.6K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_arm64.s
VAND V5.B16, V3.B16, V3.B16 VAND V5.B16, V4.B16, V4.B16 VADDP V4.B16, V3.B16, V6.B16 VADDP V6.B16, V6.B16, V6.B16 VMOV V6.D[0], R6 // Only do the clear for the last possible block with less than 32 bytes // Condition flags come from SUBS in the loop BHS tail masklast: // Clear the irrelevant upper bits ADD R9, R10, R4 AND $0x1f, R4, R4 SUB $0x20, R4, R4
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Nov 08 20:52:47 UTC 2018 - 3.3K bytes - Viewed (0) -
src/internal/bytealg/count_arm64.s
VMOV R1, V0.B16 // Clear the low 64-bit element of V7 and V8 VEOR V7.B8, V7.B8, V7.B8 VEOR V8.B8, V8.B8, V8.B8 PCALIGN $16 // Count the target byte in 32-byte chunk chunk_loop: VLD1.P (R0), [V1.B16, V2.B16] CMP R0, R3 VCMEQ V0.B16, V1.B16, V3.B16 VCMEQ V0.B16, V2.B16, V4.B16 // Clear the higher 7 bits VAND V5.B16, V3.B16, V3.B16 VAND V5.B16, V4.B16, V4.B16 // Count lanes match the requested byte
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 31 17:00:27 UTC 2023 - 2K bytes - Viewed (0) -
src/internal/bytealg/equal_arm64.s
VCMEQ V0.D2, V4.D2, V8.D2 VCMEQ V1.D2, V5.D2, V9.D2 VCMEQ V2.D2, V6.D2, V10.D2 VCMEQ V3.D2, V7.D2, V11.D2 VAND V8.B16, V9.B16, V8.B16 VAND V8.B16, V10.B16, V8.B16 VAND V8.B16, V11.B16, V8.B16 CMP R0, R6 VMOV V8.D[0], R4 VMOV V8.D[1], R5 CBZ R4, not_equal CBZ R5, not_equal BNE chunk64_loop AND $0x3f, R2, R2 CBZ R2, equal chunk16: // work with 16-byte chunks BIC $0xf, R2, R3 CBZ R3, tail
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jan 24 16:07:25 UTC 2024 - 2.5K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 18 01:40:37 UTC 2023 - 5.4K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 6.7K bytes - Viewed (0) -
src/hash/crc32/crc32_ppc64le.s
VXOR V0,V1,V0 #ifdef REFLECT VSPLTISB $1,V1 VSL V0,V1,V0 #endif VAND V0,mask_64bit,V0 #ifndef REFLECT VPMSUMD V0,const1,V1 VSLDOI $8,zeroes,V1,V1 VPMSUMD V1,const2,V1 VXOR V0,V1,V0 VSLDOI $8,V0,zeroes,V0 #else VAND V0,mask_32bit,V1 VPMSUMD V1,const1,V1 VAND V1,mask_32bit,V1 VPMSUMD V1,const2,V1 VXOR V0,V1,V0 VSLDOI $4,V0,zeroes,V0 #endif
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 06 12:09:50 UTC 2024 - 13.1K bytes - Viewed (0) -
src/crypto/aes/gcm_arm64.s
VMOV CTR.B16, B0.B16 VADD B0.S4, INC.S4, B1.S4 VREV32 B0.B16, B0.B16 VADD B1.S4, INC.S4, B2.S4 VREV32 B1.B16, B1.B16 VADD B2.S4, INC.S4, B3.S4 VREV32 B2.B16, B2.B16 VADD B3.S4, INC.S4, B4.S4 VREV32 B3.B16, B3.B16 VADD B4.S4, INC.S4, B5.S4 VREV32 B4.B16, B4.B16 VADD B5.S4, INC.S4, B6.S4 VREV32 B5.B16, B5.B16 VADD B6.S4, INC.S4, B7.S4 VREV32 B6.B16, B6.B16
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 21.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
// The uncommented cases means they can be handled by assembler // and they are consistent with disassembler decoding. // TODO means they cannot be handled by current assembler. #include "../../../../../runtime/textflag.h" TEXT asmtest(SB),DUPOK|NOSPLIT,$-8 AND $(1<<63), R1 // AND $-9223372036854775808, R1 // 21004192 ADCW ZR, R8, R10 // 0a011f1a
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/crypto/aes/gcm_ppc64x.s
VSL H, T0, H // H<<=1 VSRAB T1, T2, T1 // broadcast carry bit VAND T1, XC2, T1 VXOR H, T1, IN // twisted H VSLDOI $8, IN, IN, H // twist even more ... VSLDOI $8, ZERO, XC2, XC2 // 0xc2.0 VSLDOI $8, ZERO, H, HL // ... and split VSLDOI $8, H, ZERO, HH STXVD2X VXC2, (XIP+R0) // save pre-computed table STXVD2X VHL, (XIP+R8)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 27.1K bytes - Viewed (0)