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Results 1 - 10 of 15 for LVX (0.03 sec)

  1. src/hash/crc32/crc32_ppc64le.s

    	BC	18,0,v4
    
    	LVX	(R4+off80),V5
    	LVX	(R3+off80),V17
    	VPMSUMW	V5,V17,V5
    	BC	18,0,v5
    
    	LVX	(R4+off96),V6
    	LVX	(R3+off96),V16
    	VPMSUMW	V6,V16,V6
    	BC	18,0,v6
    
    	LVX	(R4+off112),V7
    	LVX	(R3+off112),V17
    	VPMSUMW	V7,V17,V7
    	BC	18,0,v7
    
    	ADD	$128,R3
    	ADD	$128,R4
    
    	LVX	(R4),V8
    	LVX	(R3),V16
    	VPMSUMW	V8,V16,V8
    	BC	18,0,v8
    
    	LVX	(R4+off16),V9
    	LVX	(R3+off16),V17
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 06 12:09:50 UTC 2024
    - 13.1K bytes
    - Viewed (0)
  2. src/runtime/cgo/abi_ppc64x.h

    #define RESTORE_VR(offset, rtmp)      \
    	MOVD	$(offset+16*0), rtmp  \
    	LVX	(rtmp)(R1), V20       \
    	MOVD	$(offset+16*1), rtmp  \
    	LVX	(rtmp)(R1), V21       \
    	MOVD	$(offset+16*2), rtmp  \
    	LVX	(rtmp)(R1), V22       \
    	MOVD	$(offset+16*3), rtmp  \
    	LVX	(rtmp)(R1), V23       \
    	MOVD	$(offset+16*4), rtmp  \
    	LVX	(rtmp)(R1), V24       \
    	MOVD	$(offset+16*5), rtmp  \
    	LVX	(rtmp)(R1), V25       \
    	MOVD	$(offset+16*6), rtmp  \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 03 20:17:02 UTC 2023
    - 6.6K bytes
    - Viewed (0)
  3. src/crypto/aes/asm_ppc64x.s

    #ifdef NEEDS_ESPERM
    	MOVD	$·rcon(SB), PTR // PTR points to rcon addr
    	LVX	(PTR), ESPERM
    	ADD	$0x10, PTR
    #else
    	MOVD	$·rcon+0x10(SB), PTR // PTR points to rcon addr (skipping permute vector)
    #endif
    
    	// Get key from memory and write aligned into VR
    	P8_LXVB16X(INP, R0, IN0)
    	ADD	$0x10, INP, INP
    	MOVD	$0x20, TEMP
    
    	CMPW	ROUNDS, $12
    	LVX	(PTR)(R0), RCON    // lvx   4,0,6      Load first 16 bytes into RCON
    	LVX	(PTR)(TEMP), MASK
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 20 18:05:32 UTC 2024
    - 18.6K bytes
    - Viewed (0)
  4. src/cmd/internal/notsha256/sha256block_ppc64x.s

    loop:
    	MOVD	TBL_STRT, TBL
    	LVX	(TBL)(R_x000), KI
    
    	LXVD2X	(INP)(R_x000), V8 // load v8 in advance
    
    	// Offload to VSR24-31 (aka FPR24-31)
    	XXLOR	V0, V0, VS24
    	XXLOR	V1, V1, VS25
    	XXLOR	V2, V2, VS26
    	XXLOR	V3, V3, VS27
    	XXLOR	V4, V4, VS28
    	XXLOR	V5, V5, VS29
    	XXLOR	V6, V6, VS30
    	XXLOR	V7, V7, VS31
    
    	VADDUWM	KI, V7, V7        // h+K[i]
    	LVX	(TBL)(R_x010), KI
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 14.5K bytes
    - Viewed (0)
  5. src/crypto/sha256/sha256block_ppc64x.s

    loop:
    	MOVD	TBL_STRT, TBL
    	LVX	(TBL)(R_x000), KI
    
    	LXVD2X	(INP)(R_x000), V8 // load v8 in advance
    
    	// Offload to VSR24-31 (aka FPR24-31)
    	XXLOR	V0, V0, VS24
    	XXLOR	V1, V1, VS25
    	XXLOR	V2, V2, VS26
    	XXLOR	V3, V3, VS27
    	XXLOR	V4, V4, VS28
    	XXLOR	V5, V5, VS29
    	XXLOR	V6, V6, VS30
    	XXLOR	V7, V7, VS31
    
    	VADDUWM	KI, V7, V7        // h+K[i]
    	LVX	(TBL)(R_x010), KI
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 14.4K bytes
    - Viewed (0)
  6. src/crypto/sha512/sha512block_ppc64x.s

    	VSHASIGMAD	$0, a, $1, S0; \
    	VADDUDM		FUNC, h, h; \
    	VXOR		b, a, FUNC; \
    	VADDUDM		S1, h, h; \
    	VSEL		b, c, FUNC, FUNC; \
    	VADDUDM		KI, g, g; \
    	VADDUDM		h, d, d; \
    	VADDUDM		FUNC, S0, S0; \
    	LVX		(TBL)(idx), KI; \
    	VADDUDM		S0, h, h
    
    #define SHA512ROUND1(a, b, c, d, e, f, g, h, xi, xj, xj_1, xj_9, xj_14, idx) \
    	VSHASIGMAD	$0, xj_1, $0, s0; \
    	VSEL		g, f, e, FUNC; \
    	VSHASIGMAD	$15, e, $1, S1; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 15.8K bytes
    - Viewed (0)
  7. src/runtime/cgo/gcc_linux_ppc64x.S

    	li	%r0, 0
    
    	// Restore g pointer (r30 in Go ABI, which may have been clobbered by C)
    	mr	%r30, %r4
    
    	// Call fn
    	mr	%r12, %r3
    	mtctr	%r3
    	bctrl
    
    	FOR_EACH_GPR ld
    	FOR_EACH_FPR lfd
    	FOR_EACH_VR lvx
    
    	ld	%r2, 24(%r1)
    	addi	%r1, %r1, FRAME_SIZE
    	ld	%r0, 16(%r1)
    	mtlr	%r0
    	ld	%r0, 8(%r1)
    	mtcr	%r0
    	blr
    
    #ifdef __ELF__
    .section .note.GNU-stack,"",%progbits
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 04 18:03:04 UTC 2023
    - 2K bytes
    - Viewed (0)
  8. src/runtime/asm_ppc64x.s

    	MOVD	$-192, R12
    	LVX	(R0+R12), V20
    	MOVD	$-176, R12
    	LVX	(R0+R12), V21
    	MOVD	$-160, R12
    	LVX	(R0+R12), V22
    	MOVD	$-144, R12
    	LVX	(R0+R12), V23
    	MOVD	$-128, R12
    	LVX	(R0+R12), V24
    	MOVD	$-112, R12
    	LVX	(R0+R12), V25
    	MOVD	$-96, R12
    	LVX	(R0+R12), V26
    	MOVD	$-80, R12
    	LVX	(R0+R12), V27
    	MOVD	$-64, R12
    	LVX	(R0+R12), V28
    	MOVD	$-48, R12
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 45.4K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/ppc64/anames.go

    	"POPCNTW",
    	"POPCNTB",
    	"CNTTZW",
    	"CNTTZWCC",
    	"CNTTZD",
    	"CNTTZDCC",
    	"COPY",
    	"PASTECC",
    	"DARN",
    	"MADDHD",
    	"MADDHDU",
    	"MADDLD",
    	"LVEBX",
    	"LVEHX",
    	"LVEWX",
    	"LVX",
    	"LVXL",
    	"LVSL",
    	"LVSR",
    	"STVEBX",
    	"STVEHX",
    	"STVEWX",
    	"STVX",
    	"STVXL",
    	"VAND",
    	"VANDC",
    	"VNAND",
    	"VOR",
    	"VORC",
    	"VNOR",
    	"VXOR",
    	"VEQV",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  10. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go

    		if args[1] == "0" {
    			return op + " (" + args[2] + ")," + args[0]
    		}
    		return op + " (" + args[2] + ")(" + args[1] + ")," + args[0]
    
    	case LXVX, LXVD2X, LXVW4X, LXVH8X, LXVB16X, LVX, LVXL, LVSR, LVSL, LVEBX, LVEHX, LVEWX, LXSDX, LXSIWAX:
    		return op + " (" + args[2] + ")(" + args[1] + ")," + args[0]
    
    	case LXV:
    		return op + " " + args[1] + "," + args[0]
    
    	case LXVL, LXVLL:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 10.9K bytes
    - Viewed (0)
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