//	LSHW imm ',' sreg ',' rreg
//	{
//		outcode(int($1), &$2, int($4), &$6);
//	}
	SLL	$19, R22, R21	// 0016acc0
	SLLV	$19, R22, R21	// 0016acf8
	SRL	$31, R6, R17	// 00068fc2
	SRLV	$31, R6, R17	// 00068ffa
	SRA	$8, R8, R19	// 00089a03
	SRAV	$19, R8, R7	// 00083cfb
	ROTR	$12, R8, R3	// 00281b02
	ROTRV	$8, R22, R22	// 0036b23a

//	LSHW imm ',' rreg
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}

	ISB $15                                    // df3f03d5
	LDARW (R12), R29                           // 9dfddf88
	LDARW (R30), R22                           // d6ffdf88
	LDARW (RSP), R22                           // f6ffdf88
	LDAR (R27), R22                            // 76ffdfc8
	LDARB (R25), R2                            // 22ffdf08
	LDARH (R5), R7                             // a7fcdf48

	// We won't get a nested signal.
	MOVBZ	runtime·iscgo(SB), R22
	CMP	R22, $0
	BNE	nosaveg
	MOVD	m_gsignal(R21), R22	// g.m.gsignal
	CMP	R22, $0
	BEQ	nosaveg

	CMP	g, R22
	BEQ	nosaveg
	MOVD	(g_stack+stack_lo)(R22), R22 // g.m.gsignal.stack.lo
	MOVD	g, (R22)

	BL	(CTR)	// Call from VDSO

	MOVD	$0, (R22)	// clear g slot, R22 is unchanged by C code

	JMP	finish

nosaveg:

	// We won't get a nested signal.
	MOVBU	runtime·iscgo(SB), R22
	CBNZ	R22, nosaveg
	MOVD	m_gsignal(R21), R22          // g.m.gsignal
	CBZ	R22, nosaveg
	CMP	g, R22
	BEQ	nosaveg
	MOVD	(g_stack+stack_lo)(R22), R22 // g.m.gsignal.stack.lo
	MOVD	g, (R22)

	BL	(R2)

	MOVD	ZR, (R22)  // clear g slot, R22 is unchanged by C code

	B	finish

nosaveg:
	BL	(R2)
	B	finish

	MOVD    16(R8), R21       // R21 = x[i+1]
	MOVD    24(R8), R22       // R22 = x[i+2]
	MOVDU   32(R8), R23       // R23 = x[i+3]
	MULLD   R9, R20, R24      // R24 = z0[i]
	MULHDU  R9, R20, R20      // R20 = z1[i]
	ADDC    R4, R24           // R24 = z0[i] + c
	MULLD   R9, R21, R25
	MULHDU  R9, R21, R21
	ADDE    R20, R25
	MULLD   R9, R22, R26
	MULHDU  R9, R22, R22
	MULLD   R9, R23, R27
	MULHDU  R9, R23, R23

	LSR	R4, R13, R23
	ORR	R8, R23		// z[i] = (x[i] << s) | (x[i-1] >> (64 - s))
	LSL	R3, R13
	LSR	R4, R12, R22
	ORR	R13, R22
	LSL	R3, R12
	LSR	R4, R11, R21
	ORR	R12, R21
	LSL	R3, R11
	LSR	R4, R10, R20
	ORR	R11, R20
	LSL	R3, R10, R8
	STP.W	(R20, R21), -32(R0)
	STP	(R22, R23), 16(R0)
	SUB	$4, R1
	B	loop
done:
	MOVD.W	R8, -8(R0)	// the first element x[0]

	{"R12", "R12"},
	{"R13", "R13"},
	{"R14", "R14"},
	{"R15", "R15"},
	{"R16", "R16"},
	{"R17", "R17"},
	{"R18", "R18"},
	{"R19", "R19"},
	{"R2", "R2"},
	{"R20", "R20"},
	{"R21", "R21"},
	{"R22", "R22"},
	{"R23", "R23"},
	{"R24", "R24"},
	{"R25", "R25"},
	{"R26", "R26"},
	{"R27", "R27"},
	{"R28", "R28"},
	{"R29", "R29"},
	{"R3", "R3"},
	{"R31", "R31"},
	{"R4", "R4"},
	{"R5", "R5"},

		// Scheduler ensures LoweredGetClosurePtr occurs only in entry block,
		// and sorts it to the very beginning of the block to prevent other
		// use of R22 (mips.REGCTXT, the closure pointer)
		{name: "LoweredGetClosurePtr", reg: regInfo{outputs: []regMask{buildReg("R22")}}, zeroWidth: true},

		// LoweredGetCallerSP returns the SP of the caller of the current function. arg0=mem.

	MOVD	R21, 216(R1)
	MOVD	R22, 224(R1)
	MOVD	R23, 232(R1)
	MOVD	R24, 240(R1)
	MOVD	R25, 248(R1)
	MOVD	R26, 256(R1)
	MOVD	R27, 264(R1)
	MOVD	R28, 272(R1)
	MOVD	R29, 280(R1)
	MOVD	g, 288(R1)
	MOVD	LR, R31
	MOVD	R31, 32(R1)
	CALL	runtime·debugCallCheck(SB)
	MOVD	40(R1), R22
	XOR	R0, R0
	CMP	R22, $0
	BEQ	good
	MOVD	48(R1), R22
	MOVD	$8, R20
	TW	$31, R0, R0

	SLD	$2,R18,R18	// p[6]*4
	MOVWZ	(R10)(R17),R21	// tab[0][p[7]]
	ADD	$1024,R10,R10	// tab[1]
	RLDICL	$56,R9,$56,R19	// p[5]
	SLD	$2,R19,R19	// p[5]*4:1
	MOVWZ	(R10)(R18),R22	// tab[1][p[6]]
	ADD	$1024,R10,R10	// tab[2]
	XOR	R21,R22,R21	// xor done R22
	CLRLSLDI $56,R9,$2,R20
	MOVWZ	(R10)(R19),R23	// tab[2][p[5]]
	ADD	$1024,R10,R10	// &tab[3]
	XOR	R21,R23,R21	// xor done R23
	MOVWZ	(R10)(R20),R24	// tab[3][p[4]]