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Results 31 - 40 of 947 for movbe (0.09 sec)

  1. src/cmd/compile/internal/ssa/_gen/MIPSOps.go

    		{name: "MOVWfpgp", argLength: 1, reg: fpgp, asm: "MOVW"}, // move float32 to int32 (no conversion)
    		{name: "MOVWgpfp", argLength: 1, reg: gpfp, asm: "MOVW"}, // move int32 to float32 (no conversion)
    
    		// conversions
    		{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVB"},   // move from arg0, sign-extended from byte
    		{name: "MOVBUreg", argLength: 1, reg: gp11, asm: "MOVBU"}, // move from arg0, unsign-extended from byte
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 14:43:03 UTC 2023
    - 24K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/riscv64.s

    	MOV	(X5), X6				// 03b30200
    	MOV	4(X5), X6				// 03b34200
    	MOVB	(X5), X6				// 03830200
    	MOVB	4(X5), X6				// 03834200
    	MOVH	(X5), X6				// 03930200
    	MOVH	4(X5), X6				// 03934200
    	MOVW	(X5), X6				// 03a30200
    	MOVW	4(X5), X6				// 03a34200
    	MOV	X5, (X6)				// 23305300
    	MOV	X5, 4(X6)				// 23325300
    	MOVB	X5, (X6)				// 23005300
    	MOVB	X5, 4(X6)				// 23025300
    	MOVH	X5, (X6)				// 23105300
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 22 04:42:21 UTC 2024
    - 16.7K bytes
    - Viewed (0)
  3. src/internal/bytealg/equal_riscv64.s

    	SUB	$16, X12
    	BGE	X12, X23, loop16
    	BEQZ	X12, eq
    
    loop4_check:
    	MOV	$4, X23
    	BLT	X12, X23, loop1
    loop4:
    	MOVBU	0(X10), X19
    	MOVBU	0(X11), X20
    	MOVBU	1(X10), X21
    	MOVBU	1(X11), X22
    	BNE	X19, X20, not_eq
    	BNE	X21, X22, not_eq
    	MOVBU	2(X10), X14
    	MOVBU	2(X11), X15
    	MOVBU	3(X10), X16
    	MOVBU	3(X11), X17
    	BNE	X14, X15, not_eq
    	BNE	X16, X17, not_eq
    	ADD	$4, X10
    	ADD	$4, X11
    	SUB	$4, X12
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Nov 09 13:57:06 UTC 2023
    - 2.4K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go

    		// conversions
    		{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVB"},   // move from arg0, sign-extended from byte
    		{name: "MOVBUreg", argLength: 1, reg: gp11, asm: "MOVBU"}, // move from arg0, unsign-extended from byte
    		{name: "MOVHreg", argLength: 1, reg: gp11, asm: "MOVH"},   // move from arg0, sign-extended from half
    		{name: "MOVHUreg", argLength: 1, reg: gp11, asm: "MOVHU"}, // move from arg0, unsign-extended from half
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 21 19:04:19 UTC 2023
    - 25.2K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/ppc64/anames.go

    	"FRSP",
    	"FRSPCC",
    	"FSUB",
    	"FSUBCC",
    	"FSUBS",
    	"FSUBSCC",
    	"ISEL",
    	"MOVMW",
    	"LBAR",
    	"LHAR",
    	"LSW",
    	"LWAR",
    	"LWSYNC",
    	"MOVDBR",
    	"MOVWBR",
    	"MOVB",
    	"MOVBU",
    	"MOVBZ",
    	"MOVBZU",
    	"MOVH",
    	"MOVHBR",
    	"MOVHU",
    	"MOVHZ",
    	"MOVHZU",
    	"MOVW",
    	"MOVWU",
    	"MOVFL",
    	"MOVCRFS",
    	"MTFSB0",
    	"MTFSB0CC",
    	"MTFSB1",
    	"MTFSB1CC",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  6. test/codegen/memops.go

    func idxInt8(x, y []int8, i int) {
    	var t int8
    	// amd64: `MOVBL[SZ]X\t1\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\), [A-Z]+[0-9]*`
    	//   386: `MOVBL[SZ]X\t1\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\), [A-Z]+[0-9]*`
    	t = x[i+1]
    	// amd64: `MOVB\t[A-Z]+[0-9]*, 1\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\)`
    	//   386: `MOVB\t[A-Z]+[0-9]*, 1\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\)`
    	y[i+1] = t
    	// amd64: `MOVB\t[$]77, 1\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\)`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 12.5K bytes
    - Viewed (0)
  7. test/codegen/bits.go

    func signextendAndMask8to64(a int8) (s, z uint64) {
    	// ppc64x: "MOVB", "ANDCC\t[$]1015,"
    	s = uint64(a) & 0x3F7
    	// ppc64x: -"MOVB", "ANDCC\t[$]247,"
    	z = uint64(uint8(a)) & 0x3F7
    	return
    }
    
    // Verify zero-extended values are not sign-extended under a bit mask (#61297)
    func zeroextendAndMask8to64(a int8, b int16) (x, y uint64) {
    	// ppc64x: -"MOVB\t", -"ANDCC", "MOVBZ"
    	x = uint64(a) & 0xFF
    	// ppc64x: -"MOVH\t", -"ANDCC", "MOVHZ"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 7.8K bytes
    - Viewed (0)
  8. test/codegen/noextend.go

    	// Truncate not needed, load does sign/zero extend
    
    	// ppc64x:-"MOVBZ\tR\\d+,\\sR\\d+"
    	val16[0] = uint16(*u8)
    
    	// AND not needed due to size
    	// ppc64x:-"ANDCC"
    	sval16[1] = 255 & int16(x8+y8)
    
    	// ppc64x:-"ANDCC"
    	val16[1] = 255 & uint16(*u8+z8)
    
    }
    func shiftidx(u8 *uint8, x16 *int16, u16 *uint16) {
    
    	// ppc64x:-"MOVBZ\tR\\d+,\\sR\\d+"
    	val16[0] = uint16(sval16[*u8>>2])
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Dec 14 17:22:18 UTC 2023
    - 5.4K bytes
    - Viewed (0)
  9. src/runtime/memmove_riscv64.s

    	MOV	$8, X9
    	BLT	X12, X9, f_loop4_check
    f_loop8_unaligned:
    	MOVB	0(X11), X14
    	MOVB	1(X11), X15
    	MOVB	2(X11), X16
    	MOVB	3(X11), X17
    	MOVB	4(X11), X18
    	MOVB	5(X11), X19
    	MOVB	6(X11), X20
    	MOVB	7(X11), X21
    	MOVB	X14, 0(X10)
    	MOVB	X15, 1(X10)
    	MOVB	X16, 2(X10)
    	MOVB	X17, 3(X10)
    	MOVB	X18, 4(X10)
    	MOVB	X19, 5(X10)
    	MOVB	X20, 6(X10)
    	MOVB	X21, 7(X10)
    	ADD	$8, X10
    	ADD	$8, X11
    	SUB	$8, X12
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Nov 09 13:57:06 UTC 2023
    - 5.5K bytes
    - Viewed (0)
  10. src/cmd/internal/obj/s390x/anames.go

    	"MODW",
    	"MODWU",
    	"MODD",
    	"MODDU",
    	"MULLW",
    	"MULLD",
    	"MULHD",
    	"MULHDU",
    	"MLGR",
    	"SUB",
    	"SUBC",
    	"SUBV",
    	"SUBE",
    	"SUBW",
    	"NEG",
    	"NEGW",
    	"MOVWBR",
    	"MOVB",
    	"MOVBZ",
    	"MOVH",
    	"MOVHBR",
    	"MOVHZ",
    	"MOVW",
    	"MOVWZ",
    	"MOVD",
    	"MOVDBR",
    	"MOVDEQ",
    	"MOVDGE",
    	"MOVDGT",
    	"MOVDLE",
    	"MOVDLT",
    	"MOVDNE",
    	"LOCR",
    	"LOCGR",
    	"FLOGR",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Sep 05 16:41:03 UTC 2023
    - 7.1K bytes
    - Viewed (0)
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