//go:build ppc64 || ppc64le

#include "textflag.h"

// func archModf(f float64) (int float64, frac float64)
TEXT ·archModf(SB),NOSPLIT,$0
	FMOVD	f+0(FP), F0
	FRIZ	F0, F1
	FMOVD	F1, int+8(FP)
	FSUB	F1, F0, F2
	FCPSGN	F2, F0, F2
	FMOVD	F2, frac+16(FP)

	WFCHDBS	V4, V2, V2
	BEQ	LEXITTAGlog1p
	MOVD	$·log1pxnan<>+0(SB), R1
	FMOVD	0(R1), F0
	FMOVD	F0, ret+8(FP)
	RET

L8:
	LDGR	R2, F2
	FSUB	F4, F3
	FMADD	F2, F4, F1
	MOVD	$·log1pc4<>+0(SB), R2
	WORD	$0xB3130041	// lcdbr %f4,%f1
	FMOVD	0(R2), F7
	FSUB	F3, F0
	MOVD	$·log1pc3<>+0(SB), R2
	FMOVD	0(R2), F3
	MOVD	$·log1pc2<>+0(SB), R2
	WFMDB	V1, V1, V6
	FMADD	F7, F4, F3
	WFMSDB	V0, V2, V1, V0

	FMOVD	F2, ret+8(FP)
	RET

L2:
	LTDBR	F0, F0
	MOVH	$0x0, R4
	BLTU	L3
	FMOVD	F0, F1
L9:
	MOVH	$0x400F, R3
	MOVW	R1, R6
	MOVW	R3, R7
	CMPBGT	R6, R7, L10
	FMOVD	784(R9), F3
	FSUB	F1, F3
	VLEG	$0, 776(R9), V20
	WFDDB	V1, V3, V6
	VLEG	$0, 768(R9), V18
	FMOVD	760(R9), F7
	FMOVD	752(R9), F5
	VLEG	$0, 744(R9), V16
	FMOVD	736(R9), F3
	FMOVD	728(R9), F2
	FMOVD	720(R9), F4

	if symname == nil {
		symname = func(uint64) (string, uint64) { return "", 0 }
	}

	// Adjust opcode [sic].
	switch inst.Op {
	case FDIV, FDIVR, FSUB, FSUBR, FDIVP, FDIVRP, FSUBP, FSUBRP:
		// DC E0, DC F0: libopcodes swaps FSUBR/FSUB and FDIVR/FDIV, at least
		// if you believe the Intel manual is correct (the encoding is irregular as given;
		// libopcodes uses the more regular expected encoding).

	"FNABS",
	"FNABSCC",
	"FNEG",
	"FNEGCC",
	"FNMADD",
	"FNMADDCC",
	"FNMADDS",
	"FNMADDSCC",
	"FNMSUB",
	"FNMSUBCC",
	"FNMSUBS",
	"FNMSUBSCC",
	"FRSP",
	"FRSPCC",
	"FSUB",
	"FSUBCC",
	"FSUBS",
	"FSUBSCC",
	"ISEL",
	"MOVMW",
	"LBAR",
	"LHAR",
	"LSW",
	"LWAR",
	"LWSYNC",
	"MOVDBR",
	"MOVWBR",
	"MOVB",
	"MOVBU",
	"MOVBZ",
	"MOVBZU",

	"FDIV",
	"FDIVS",
	"FMADD",
	"FMADDS",
	"FMOVD",
	"FMOVS",
	"FMSUB",
	"FMSUBS",
	"FMUL",
	"FMULS",
	"FNABS",
	"FNEG",
	"FNEGS",
	"LEDBR",
	"LDEBR",
	"LPDFR",
	"LNDFR",
	"FSUB",
	"FSUBS",
	"FSQRT",
	"FSQRTS",
	"FIEBR",
	"FIDBR",
	"CPSDR",
	"LTEBR",
	"LTDBR",
	"TCEB",
	"TCDB",
	"LDGR",
	"LGDR",
	"CEFBRA",
	"CDFBRA",
	"CEGBRA",
	"CDGBRA",

	WORD	$0xB3130022	//lcdbr	%f2,%f2
	MOVD	$·expm1tab<>+0(SB), R2
	WORD	$0x68432000	//ld	%f4,0(%r3,%r2)
	FMADD	F4, F0, F0
	SLD	$48, R1, R2
	WFMSDB	V2, V0, V4, V0
	LDGR	R2, F4
	WORD	$0xB3130000	//lcdbr	%f0,%f0
	FSUB	F4, F6
	WFMSDB	V0, V4, V6, V0
	FMOVD	F0, ret+8(FP)
	RET
L16:
	WFCEDBS	V2, V2, V4
	BVS	LEXITTAGexpm1
	WORD	$0xED205008	//cdb	%f2,.L34-.L22(%r5)
	BYTE	$0x00
	BYTE	$0x19
	BLT	L6

	FMOVD   0(R1), F5
	MOVD    $sinhe2<>+0(SB), R1
	VLEG    $0, 0(R1), V16
	MOVD    $sinhe1<>+0(SB), R1
	WFMADB  V2, V5, V16, V5
	VLEG    $0, 0(R1), V16
	WFMADB  V3, V7, V5, V3
	WFMADB  V2, V1, V16, V1
	FSUB    F6, F0
	FMUL    F1, F4
	MOVD    $sinhe0<>+0(SB), R1
	FMOVD   0(R1), F6
	WFMADB  V2, V3, V6, V2
	WFMADB  V0, V2, V4, V0
	FMOVD   F0, ret+8(FP)
	RET

L9:
	WFMADB  V0, V1, V6, V0

		return true
	case DIVD, DIVDCC, DIVDU, DIVDUCC, DIVDE, DIVDECC, DIVDEU, DIVDEUCC, DIVDO, DIVDOCC, DIVDUO, DIVDUOCC:
		return true
	case MODUD, MODSD, MODUW, MODSW:
		return true
	case FADD, FADDS, FSUB, FSUBS, FMUL, FMULS, FDIV, FDIVS, FMADD, FMADDS, FMSUB, FMSUBS, FNMADD, FNMADDS, FNMSUB, FNMSUBS, FMULSCC:
		return true
	case FADDCC, FADDSCC, FSUBCC, FMULCC, FDIVCC, FDIVSCC:
		return true

	MOVW	R1, R6
	CMPBEQ	R6, $0, L29
	LTDBR	F2, F2
	BLTU	L50
	FMOVD	F2, F4
L14:
	MOVD	$·pow_x433<>+0(SB), R1
	FMOVD	0(R1), F7
	WFCHDBS	V4, V7, V3
	BEQ	L15
	WFADB	V7, V4, V3
	FSUB	F7, F3
	WFCEDBS	V4, V3, V3
	BEQ	L15
	LTDBR	F0, F0
	FMOVD	8(R9), F4
	BNE	L16
L13:
	LTDBR	F2, F2
	BLT	L18
L40:
	FMOVD	$0, F0
	WFMDB	V4, V0, V1
	BR	L1
L49:
	WFMDB	V0, V4, V1