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Results 1 - 10 of 71 for sval16 (0.13 sec)
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test/codegen/noextend.go
// ppc64x:-"MOVBZ\tR\\d+,\\sR\\d+" val16[0] = uint16(*u8) // AND not needed due to size // ppc64x:-"ANDCC" sval16[1] = 255 & int16(x8+y8) // ppc64x:-"ANDCC" val16[1] = 255 & uint16(*u8+z8) } func shiftidx(u8 *uint8, x16 *int16, u16 *uint16) { // ppc64x:-"MOVBZ\tR\\d+,\\sR\\d+" val16[0] = uint16(sval16[*u8>>2]) // ppc64x:-"MOVH\tR\\d+,\\sR\\d+" sval16[1] = int16(val16[*x16>>1])
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Dec 14 17:22:18 UTC 2023 - 5.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tensorflow/tests/lower_tf.mlir
// CHECK: [[VAL14:%.+]] = "tf.ExpandDims"([[VAL10]]#1, [[VAL5]]) // CHECK: [[VAL15:%.+]] = "tf.ExpandDims"([[VAL8]]#3, [[VAL5]]) // CHECK: [[VAL16:%.+]] = "tf.ConcatV2"([[VAL12]], [[VAL13]], [[VAL14]], [[VAL15]], [[VAL5]]) // CHECK: [[VAL17:%.+]] = "tf.Cast"([[VAL8]]#1) // CHECK: [[VAL18:%.+]] = "tf.Cast"([[VAL10]]#0) // CHECK: [[VAL19:%.+]] = "tf.Div"([[VAL17]], [[VAL18]])
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Fri Jan 05 18:35:42 UTC 2024 - 92K bytes - Viewed (0) -
staging/src/k8s.io/apiextensions-apiserver/pkg/apiserver/schema/cel/celcoststability_test.go
"has(self.val1)": 1, "has(self.val1) && has(self.val2)": 2, "!has(self.val1)": 2, "self.val1.all(k, size(self.val1) > 0)": 7340028, "self.val1.exists_one(k, self.val1 == ['a'])": 15728629, "!self.val1.exists_one(k, size(self.val1) > 0)": 6291455,
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Wed Feb 28 19:20:16 UTC 2024 - 80.2K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/legalize-tf-while.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 5K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/experimental/tac/tests/get-alternative-subgraph.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 20.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64splitload.rules
(CMPLconstload {sym} [vo] ptr mem) && vo.Val() != 0 => (CMPLconst (MOVLload {sym} [vo.Off()] ptr mem) [vo.Val()]) (CMPWconstload {sym} [vo] ptr mem) && vo.Val() != 0 => (CMPWconst (MOVWload {sym} [vo.Off()] ptr mem) [vo.Val16()]) (CMPBconstload {sym} [vo] ptr mem) && vo.Val() != 0 => (CMPBconst (MOVBload {sym} [vo.Off()] ptr mem) [vo.Val8()])
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 04 19:35:46 UTC 2022 - 3.4K bytes - Viewed (0) -
staging/src/k8s.io/apiextensions-apiserver/pkg/apiserver/schema/cel/validation_test.go
"string(self.val5) == 'true'", "string(self.val7) == self.val6", "duration(self.val8) == self.val9", "string(self.val9) == self.val8", "timestamp(self.val10) == self.val11", "string(self.val11) == self.val10", "timestamp(self.val12) == self.val13", "string(self.val13) == self.val12", }, }, {name: "lists", obj: objs([]interface{}{1, 2, 3}, []interface{}{1, 2, 3}),
Registered: Sat Jun 15 01:39:40 UTC 2024 - Last Modified: Tue Jun 04 17:14:10 UTC 2024 - 159.9K bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/tests/prepare-composite-functions-tf.mlir
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 122.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/386splitload.rules
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 04 19:35:46 UTC 2022 - 620 bytes - Viewed (0) -
test/codegen/shift.go
func provedUnsignedShiftLeft(val64 uint64, val32 uint32, val16 uint16, val8 uint8, shift int) (r1 uint64, r2 uint32, r3 uint16, r4 uint8) { if shift >= 0 && shift < 64 { // arm64:"LSL",-"CSEL" r1 = val64 << shift } if shift >= 0 && shift < 32 { // arm64:"LSL",-"CSEL" r2 = val32 << shift } if shift >= 0 && shift < 16 { // arm64:"LSL",-"CSEL" r3 = val16 << shift } if shift >= 0 && shift < 8 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 21 18:53:43 UTC 2024 - 12.7K bytes - Viewed (0)